<ElBarto>
marble_visions: if no boards uses it that's expected
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<marble_visions>
ElBarto: oh, ok. i thought that the dtsi's define the soc in its entirety, and the other dts's down the line make the configuration
<marble_visions>
i'll just add the pins_b to my tree, and work with it like that.
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<willmore>
marble_visions, from my understanding, dt's define boards not SoCs. Hence the issues with the OpiZ USB header not being defined by default.
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<marble_visions>
interesting
<marble_visions>
it would be better if the root dt's define an soc, since the board uses an soc in a specific configuration..
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<mripard>
marble_visions: the DTSI defines the SoC, the DTS the board
<ullbeking>
KotCzarny: at that price, expect it to be truly horrible. I once bought sth similar and immediately went back to proper monitors.
<marble_visions>
mripard: correct, apologies, i mean that mmc2_pins_b should be in the DTSI.\. and then use them or not in the DTS's
<ullbeking>
There ARE good tiny monitors, but the still cost.
<KotCzarny>
ullbeking: and what do you think about xunlong other board prices? are they as horrible as the price tag suggests?
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<mripard>
marble_visions: and Uboot doesn't use the DTS for everything
<mripard>
there's still a lot that is hardcoded
<mripard>
including the pinmuxing
<ullbeking>
KotCzarny: no, of course not. In fact, I was showing Aliexpress to my wife last night, marvelling at what an amazing, unprecedented deal OPi Zero is.
<mripard>
so they might just use an older version of the DTs that just work for what u-boot uses
<marble_visions>
mripard: thanks for info, will double-check how and what they are using in their uboot
<KotCzarny>
ullbeking: then we have to wait for someone that actually gets the display to comment
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<ullbeking>
KotCzarny: that's a more scientific approach, yes. But I was told that the 7" monitor I got was very similar to the ones that the soc manufacturers sell, possibly even from same bulk stock.
<ullbeking>
Anyway, this is now turning into speculation
<ullbeking>
I apologise
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<KotCzarny>
scientific approach can also use inter/extrapolation
<KotCzarny>
:)
<ullbeking>
Two things I hate: speculation and punditry
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<mripard>
marble_visions: it's not used in NTC's u-boot
<mripard>
it's hardcoded in the source code
<Pe3ucTop>
hello to all, small question about clock seting up in DTS .. curently I have only OSC / LOSC and CCU defined in existing .dts[i] files.. I would like to change parrent and divisors for APB2 clock. Do I need to define all parents and apb2 in dts file ??
<willmore>
For 200 units, they'll likely all be sold before anyone gets their hands on one.
<marble_visions>
oh, right, i don't actually need sdc2 support inside uboot, i need it in linux
<marble_visions>
i thought the dtb was shared
<mripard>
the source is shared
<mripard>
but they both use their own copy
<mripard>
so if you want to modify something in the Linux configuration, you just need to edit linux' DT
<marble_visions>
mripard: good to know. thanks!
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<Pe3ucTop>
Could anybody advice example of reconfiguration or configuration of single SOC clock (not external source), but internal APB/AHB/PLL ???
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<mripard>
Pe3ucTop: what are you trying to do ?
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<Pe3ucTop>
mripard: I need to switch APB2 parent clock from 24Mhz Osc to PLL and define dividers... to speedup UART..
<mripard>
then the UART driver should call clk_set_rate on its clock to adjust it to its baudrate
<Pe3ucTop>
mripard: hm, it must work that way out of the box or still need to change dts and define UARTs boudrate ? As I know, UART do not change clock after it is initialized (in dmesg I see UART initialized with clock 1500000) ..
<mripard>
you shouldn't need to change the DTRS
<Pe3ucTop>
mripard: is there other options ?? I do not think that change pheripheral clock source in realtime is better.
<mripard>
can you give me the baudrate of that UART for all the users of that SoC out there?
<mripard>
if not, then runtime is the only option
<Pe3ucTop>
Some time ago I got UART working for 12.5Mbps, on A13 . Curently I'm working on other Allwiner SOC and do not see definitions for APB. So I understand those are initialized from defaults (or like u-boot initialize those).
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<Pe3ucTop>
mripard: On A13 i working with 12.5Mbps UART it's = APB 600 / 3 => 200Mhz , and it's /16 by UART itself...
<Pe3ucTop>
it was achived by assigning clock 200M to APB and hacked a bit clock initialization (I think it's not needed any more).
<Pe3ucTop>
So I would like to do the same corect way by setting APB to the same 200Mhz by devicetree.
<Pe3ucTop>
Short question is - how to setup only APB2 to those 200Mhz ?
<Pe3ucTop>
And there still is posibility to chose baudrate in application ...
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<Pe3ucTop>
mripard: Did I understand your question correct ?? I think 115200 bod as always for console, this does not need be changed. Driver calculate working baudrate correctly (independently is it sourced from 200Mhz or from 24Mhz).
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