<PITYHERO233>
hi,anybody here knowing how to let any module with rasp-pi or pcduino or arduino receive radio in about 800mhz to 1000mhz?
<PITYHERO233>
i just need a solution to receive radio in 800-1000mohz
<KotCzarny>
gsm sniffer?
<PITYHERO233>
like osmocomBB?will that work?
<PITYHERO233>
for i wish to receive the signal of the phone when the local phone service is down
<PITYHERO233>
i don't need the message or phone call or anything of the phone,i just need to proof its existence
<MoeIcenowy>
igraltist: yes
<MoeIcenowy>
the eth support got dropped before 4.13.0 stable out
<MoeIcenowy>
due to some discussions in DT binding
<plaes>
and for me it did not work on opi zero
<MoeIcenowy>
you need to revert several commits if you really want to use it ;-)
<MoeIcenowy>
and can stand replace DT when updating kernel
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<igraltist>
yes last working was 4.13-rc7 so have to stay there
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<igraltist>
when the nic is plan to working again 4.14?
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<plaes>
igraltist: hopefully
<MoeIcenowy>
montjoie says that he lacks a proper cover letter for the ready patchset
<MoeIcenowy>
;-)
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<igraltist>
hmm my english is to bad cant help for writing a letter
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<montjoie>
MoeIcenowy: the cover letter is ready BUT net-next is closed
<montjoie>
and I need the mdio-mux patch to be accepted (reviewedby ffaineli yesterday)
<cds>
Can anyone clarify the status of the A20 NAND driver in linux-sunxi? It's been removed from defconfig. I've heard reports that it writes back to the device when it shouldn't.... ?
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<jmcneill>
Hi folks -- has anybody ever been successful at booting a 32-bit kernel on Pine64?
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<jmcneill>
It seems that U-Boot detects the 32-bit uimg, but doesn't know how to switch to AArch32 mode at EL2 (kernel is executed in AArch64 mode).
<jmcneill>
Adding CONFIG_ARMV8_SWITCH_TO_EL1 to the U-Boot build gets the kernel booting, but then I'm seeing some bad behavior that I can't explain wrt the MMU.
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<jmcneill>
The CONFIG_ARMV8_SWITCH_TO_EL1 trick works on other armv8 SoCs (like Tegra X1), difference being that ATF isn't used there.
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<agraf>
jmcneill: if you want aarch32 EL2 you need to tell ATF to do the switch
<agraf>
jmcneill: EL2 can't change its own mode
<agraf>
jmcneill: or you'd have to compile an aarch32 u-boot ;)
<agraf>
jmcneill: either way, if you're fine enough on EL1, that should work
<agraf>
jmcneill: not sure why you're getting MMU problems though - what exactly do they look like?
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<MoeIcenowy>
is it possible to detect a u-boot.bin's architecture?
<jmcneill>
Yeah no problem with EL1.. booting in AArch32 mode is stopgap until NetBSD AArch64 pmap is ready.
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<jmcneill>
Very early in pmap init, a page is mapped and then we fault trying to write to it. Can't explain it :/
<jmcneill>
(and early pmap is a bit out of my domain)
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<jmcneill>
common code used across all other ports, not sure why pine64 is different (but it's been driving me crazy)
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<agraf>
MoeIcenowy: apritzel worked on fit support for SPL which then also had support for aarch32 payloads iirc
<agraf>
jmcneill: maybe a stale TLB entry? but we really shouldn't have run in EL1 before so there shouldn't be any
<agraf>
jmcneill: also, what's the holdup on native aarch64 mode? sounds like a much better thing to invest time in :)
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<jmcneill>
Yeah, that's in progress by others. My plan was to get the drivers ready in the meantime.
<agraf>
i see
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<agraf>
what fault do you get?
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<jmcneill>
I should have brought the board with me; I have a log handy but I had inserted a breakpoint before the fault info is printed.
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<smaeul>
MoeIcenowy: I can squeeze ATF into the upper 40k of SRAM A2, which leaves 24k + the exception vectors for ARISC firmware
<smaeul>
that should be doable. yes, the ARISC blob is pretty large (over 64k), but it was obviously compiled with -O0, and several unused functions, so there's a lot of room for improvement
<smaeul>
because AW can't be bothered to write udelay properly (ironically, ARISC blob contains both a timer-based udelay, as well as a instruction loop)
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<MoeIcenowy>
smaeul: I think some chip come with only 32K SRAM A2
<smaeul>
MoeIcenowy: but those don't have ATF
<MoeIcenowy>
but I don't think this is a proper solution
<MoeIcenowy>
maybe there will be a 64-bit SoC with only 32K SRAM A2
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<smaeul>
then we'd have to move ATF back to DRAM for that SoC?
<anarsoul>
MoeIcenowy: while you're at it, what are the plans for AR100 core? ignore it for mainline?
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<MoeIcenowy>
smaeul: I think maybe finally so
<MoeIcenowy>
anarsoul: We will finally use it
<anarsoul>
what about toolchain?
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<smaeul>
or1k-gcc works
<anarsoul>
but it isn't merged into upstream
<MoeIcenowy>
at least it's FOSS
<smaeul>
MoeIcenowy: problem is, in non-secure mode, I don't think TZASC does anything, so we can't prevent Linux/untrusted world from touching ATF
<MoeIcenowy>
place it in SRAM A2 cannot also prevent it.
<MoeIcenowy>
oh I should use either
* vagrantc
wonders what the controversey for the dwmac-sun8i devicetree bindings is all about
<smaeul>
MoeIcenowy: true
<montjoie>
vagrantc: how to represent the mdio-mux of h3
* vagrantc
saw they were removed in git, but didn't see any reference to the specific discussion
<vagrantc>
hrm.
<vagrantc>
is there a resolution in sight?
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<jmcneill>
BSD also interested in a resolution :) We have been patching the dts in the meantime.
<smaeul>
I was remembering wrong, it's the TZASC itself that's not accessible from NS world even in NS boot, not SRAM A2
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<montjoie>
vagrantc: yes just need to send patches but net-next is closed
* vagrantc
doesn't have an understanding of what's wrong with the old enough to propose anything better
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<kilobyte>
dwmac-sun8i worked for me fine on -rc5 on NanoPi NEO H3 and Pine64, 4.13.0 doesn't even after reverting the revert; not sure what I'm missing
* kilobyte
hopes for an answer "don't bother, try after 4.14-rc1".
<vagrantc>
kilobyte: seems you'd need to revert several: ad4540cc5aa3dccb8e1e12458d57f8c40fae5a1c, d93b07f8a689cde962d4f97668a74ab76f55734d, 87e1f5e8bb4bd584de0a8f3b1e42196dca221d02 and fe45174b72aead678da581bab9e9a37c9b26a070
<vagrantc>
kilobyte: not sure if there are others
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<antony>
kilobyte: dwmac works for me. with Armbian, 4.13 on H5 nanopi neo plus2
<antony>
dwmac-sun8i 1c30000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
<kilobyte>
vagrantc: those four commits were not enough; Icenowy's tree is (even if H3 is not 64).
<kilobyte>
reminds me of pre-mainlined USB on A64: seemingly almost-identical patchsets worked for me if and only if they were pushed by Icenowy. Same for -emac. I think I start to get the pattern...
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<dave0x6d>
What record throughout (Mbps) are you guys seeing with AES-GCM on ARMv8 platforms?
<dave0x6d>
Was looking at the MacchiatoBIN.
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<willmore>
dave0x6d, name a benchmark.
<willmore>
dave0x6d, it's more storage and generic crypto based, but there's a lot of data here: https://forum.armbian.com/index.php?/topic/4583-rock64/
<willmore>
If you have something specific you want looked at let me know and I can run it on an OpiPC2 and an Odroid C2.