rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*
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<wens> they are the DRQ numbers from the datasheets
<wens> DuClare: on sunxi, gpio sets pinmux for you, because the gpio in/out are also pinmux functions
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<suprothunderbolt> I'm returning to the battle of getting all the channels out of this codec :)
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<suprothunderbolt> fix the channel ordering issue after fiddling with the lrclk polarity and channel mapping
<wens> do you have a scope?
<wens> might be worth checking the actual polarity on the lines
<suprothunderbolt> yeah.
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<suprothunderbolt> but TDM is properly working now
<suprothunderbolt> with the 6 in 8 out codec
<suprothunderbolt> the channel mapping register was pretty confusing to get right: 0x61407352
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<DuClare> wens: Well it seems as if MOSI gets configured as an input..
<DuClare> That can't be right
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<DuClare> Or hmm, does it change direction? :|
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<DuClare> wens: Also how would I configure pull up/down? I think you need pinctrls with bias-pull-up/bias-pull-down for that
<wens> there are new GPIO flags that can be used to configure pull-up/down
<wens> DuClare: example: https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/for-next&id=a107bd2b6b63d510fecc402657f627dcfb205c89
<DuClare> Aha, looks like these are really new since grep didn't find such things on my end :)
<DuClare> Still wondering about why mosi would show up as an input
<wens> yeah, it's quite new
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<DuClare> Luckily there shouldn't be anything to stop me from updating my kernel (it's pretty new anyway), but I think bitbanged spi should work even without pulls
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<wens> looks like the spi bit-bang system sets the mosi to input in rx mode
<wens> was done in commit 4b859db2c6069 to support 3 wire mode
<wens> probably harmless for normal SPI
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<DuClare> Ok, I don't know why, but simply updating kernel made bitbanged spi work
<DuClare> (From 5.1-rc1 to 5.1-rc7)
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<fALSO> bom dia
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<DuClare> GPIO_PULL_UP doesn't actually work in 5.1rc7
<DuClare> Nevermind, I'm stupid
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<willmore> DuClare, specifically how so that the next person won't make that mistake.
<wens> I suggest working on linux-next
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<DuClare> willmore: You need parenthesis around the operands, <&pio 2 0 GPIO_ACTIVE_HIGH | GPIO_PULL_UP> won't work :)
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<willmore> That's a good thing to make note of, thanks, DuClare.
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<DuClare> Yeah this kinda baffles me
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<DuClare> I have a bunch of spi devices on one bus
<DuClare> All but one of them work with allwinner,sun8i-h3-spi
<DuClare> All of them appear to work with bitbanged spi
<DuClare> The one that doesn't work with the built-in spi always reads high for every bit
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<ndufresne> paulk-leonov, _cedrus_write_ref_list is doing a reference frame (capture buffer) lookup to pick the field and check if it has bottom field in it
<ndufresne> paulk-leonov, that one is completely wrong
<paulk-leonov> ndufresne, most likely indeed
<paulk-leonov> interlaced wasn't tested on h264
<ndufresne> in the ref list, you tell the decode to use top or bottom
<paulk-leonov> it's very likely broken
<ndufresne> with that code, as soon as bottom is decoded it will alway use bottom
<paulk-leonov> keeping note of that
<paulk-leonov> will fix when revising h264
<ndufresne> what that uAPI meant I believe for using .field, was to read the .field value on the slice buffer (on OUTPUT queue)
<ndufresne> or something, but I think it just does not work
<paulk-leonov> ndufresne, I'm not sure our VPU does deinterlacing though
<paulk-leonov> (cedrus)
<ndufresne> it does not matter really
<ndufresne> deinterlacing is external
<ndufresne> got a go
<paulk-leonov> alright then
<ndufresne> paulk-leonov, along with that information, we also need to pass the view id (MVC), so if we extend we should make space for that one too
<paulk-leonov> great, noted
<ndufresne> we then need to decide if we limit to 2 views, which is what most decoder do
<paulk-leonov> ideally we should allow more with more controls
<paulk-leonov> but not sure how well that can fit in
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<paulk-leonov> basically, anything that's an h264 extension should get its own separate control IMO
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<ndufresne> paulk-leonov, so you'd make multiple array of ref-list in seperate control, it's a bit ...
<ndufresne> but it would be extensible
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<paulk-leonov> ndufresne, I guess we would have the extra ref lists in the control as well
<ndufresne> "the extra" ?
<ndufresne> I was just saying that we have N ref, which right now are index in the dpb entry, but for each of the ref, we also need some more data, right now we need to know if it's a top or bottom reference, and if it's view 0 or 1
<ndufresne> that being said, for h264, I doubt anything will be added in the future
<paulk-leonov> ah sorry I mixed things up -- we should definitely support interleaved in the main controls
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<ndufresne> paulk-leonov, something that bugs me if the nuance between a reference list and the dpb, normally those two have similar info, but the order is different, I haven't checked the spec though yet
<ndufresne> do you know if we really pass dpb order to the kernel atm ?
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<paulk-leonov> ndufresne, I'm pretty sure it's reworked to not evict entries that are not needed for the current frame but might be needed later, and the list is ordered to that each buffer keeps the same index in it
<ndufresne> ok, I'll keep that in mind
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<willmore> DuClare, did you try different clock speeds?
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<DuClare> willmore: Yes I did, all the way down to 10kHz
<DuClare> (Chip supports up to 10 MHz)
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<hanetzer> so bootlin.com is giving me issues on a particular blog post. mkenvimage-uboot-binary-env-generator
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