<hlauer>
jernej, wens: About "Fix ethernet phy-mode" patchv3 Fixes tag: In commit 968f2c916939 the ethernet phy node is moved, or is it de332de26d19 ?
<ullbeking>
KotCzarny: if I had a pile of HP Elitedesk 800 G2 boards, say 5, in a hyperconverged Ceph cluster, stacked with standoffs, where do I put the drives?
<ullbeking>
I need to design and laser cut a "chassis" right
<KotCzarny>
how many drives?
<KotCzarny>
and how many drives per board
<KotCzarny>
because if, say, 12 or more, then just buy some old rack server
<KotCzarny>
less hasle, wires and will have ecc memory as a bonus
<KotCzarny>
*hassle
<ullbeking>
KotCzarny: is this OT for this channel?
<KotCzarny>
a lot
<KotCzarny>
:)
<ullbeking>
Basically, I want to build a QUIET home NAS. We have a small apartment so it needs to live in the living room.
<ullbeking>
I though of a single board with a small chassis and mITX board ...
<KotCzarny>
lets go priv
<ullbeking>
But then I considered a hyperconverged stack of SBC's
<gediz539>
what is the meaning of "DWA" in context of audio codec?
<mru>
gediz539: a little more context?
<gediz539>
Audio Codec Register List (0x01C22C00) on A13, 24th bit of DAC Digital Part Control Register (Offset: 0x00), Description is just "DWA. DWA Function Disable"
<mru>
maybe they accidentally turned an M upside down
<gediz539>
oh...
<mru>
joking
<gediz539>
lol you got me
<gediz539>
it's allwinner, we're never out of surprises you know
<mru>
oh, it's probably data weighted averaging
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<mru>
it's a distortion reduction thing
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<gediz539>
thanks a bunch
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<jernej>
they even got documentation wrong for above issue
<jernej>
another example would be combined reset line for mixer0 and mixer1 on H3
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<apritzel>
jernej: yeah, I am assuming the worst ;-)
<juri_>
ullbeking: bannana pi pro, orange pi R1, a few other a20 boards...
<apritzel>
jernej: the nasty thing is that EHCI/OCHI can work with any number of clocks and reset (also PHYs), so we can just enumerate in the DT and be done (as we already do)
<apritzel>
jernej: but this issue seems to be about the PHY, and we can only have one clock and one reset per PHY
<apritzel>
jernej: so if there is a shared reset or whatever, we need to dismantle the PHY driver and see how we can plug this in there
<jernej>
hlauer: none of those two commits touches phy-mode of bananapro
<jernej>
apritzel: I guess there must be some clue in BSP code
<apritzel>
jernej: yeah, but it's already hard to read for much simpler things ...
<jernej>
:)
<jernej>
still easier than reversing blobs :)
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<jernej>
hm... nothing special in BSP at first glance
<jernej>
fun fact, BSP has node defined as "ohciX-controller@0x05310400" but this address doesn't even appear in regs property
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<apritzel>
jernej: yeah, but they have the same ranges as the EHCI controller, and they encompass both devices. I also like that SRAM base starting at 0 ;-)
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<hlauer>
jernej: I saw only the initial commit of bananapro dts looking for phy-mode. But AFAIR Gbit worked with older kernels fine
<jernej>
of course it is
<jernej>
because older phy driver didn't override delays
<jernej>
but that is not the point
<hlauer>
ok, so what is the point?
<jernej>
you are fixing phy-mode so you have add fixes tag for that commit which introduced wrong phy-mode property
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<hlauer>
that would be the initial commit of bapro dts then. is that ok for a fixes tag?
<jernej>
yes
<jernej>
note that this issue is not typical one, so it might be even more confusing for first contribution
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<hlauer>
it's not my first, but the older several year ago where taken without a fixes tag. anyway, thanks for your help
<jernej>
core issue is that driver didn't fully follow DT bindings and many DT files relied on that behaviour
<jernej>
once driver was fixed, many ethernet connections stopped working
<jernej>
apritzel: are you sure the issue is only with usb1 port? did you test other ports?
<apritzel>
jernej: I am not sure I can use USB0, I don't think it powers the bus? Will try my USB-C OTG adapter tonight
<apritzel>
jernej: I think hexdump0815 reported the same problem with USB3 on his TV box (does not work with just 0 & 3 enabled, works with all ports enabled)
<apritzel>
I need to build a cable tonight to verify this on the OPi Zero2
<apritzel>
port 2 definitely work on its own
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<hexdump0815>
apritzel: jernej: i just tested - if i add 0,2+3 then is see the usb devices on 0+3 - without 2 in the dts i get usb errors - so looks like 2 is really required for 0 and 3 to work well
<apritzel>
hexdump0815: ah, many thanks! And 0+2 just make the first port work, whereas just 0 gives you nothing?
<apritzel>
(You can tweak the DT in U-Boot on the command line, just before booting the kernel)
<hexdump0815>
apritzel: let me check ...
<hexdump0815>
apritzel: i just checked 0 and 3 alone separately - both did not work and then both alone combined with 2 and then they are working - so 2 is required for each of them
<apritzel>
hexdump0815: many thanks for that!
<hexdump0815>
apritzel: i'm happy to help bringing h616 support forward :)
<jernej>
could it be some bug in driver?
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<hexdump0815>
could it also be strange wiring in the tv box? jernej: does it work the same way on your t95 box?
<jernej>
I don't have t95 set up currently...
<jernej>
but this is more internal thing
<hexdump0815>
i think apritzel also mentioned he saw the same behaviour when testing the other usb ports on the pins on the opi zero 2 too
<jernej>
I guess easy way to check would be to dump BSP registers and compare them...
<hexdump0815>
jernej: how to dump them? i have a bsp installation on that box ready as well ...
<jernej>
devmem
<hexdump0815>
jernej: btw. i you want to have anything dumped for hdmi as well, just let me know
<jernej>
ah, no need, thanks, I already did it myself
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<jernej>
apritzel: I don't see any place where BSP driver would set PHY_CTL_VBUSVLDEXT flag
<jernej>
apritzel: and SIDDQ is cleared for each PHY
<hexdump0815>
btw. i was very positively surprised to see that suspend-to-disk/hibernation is working perfectly fine on a h6 tv box - all was working well including panfrost after resume ... rockchip is loosing usb and amlogic hangs while testing the same ...
<jernej>
yeah, smaeul did a good job here
<apritzel>
jernej: you mean SIDDQ clear for *every* of the four PHYs, regardless of their actual usage?
<jernej>
yes
<apritzel>
that's annoying
<jernej>
oh, H616 manual says PHY_CTL_VBUSVLDEXT is fixed internally, register value invalid
<jernej>
what is SIDDQ flag? manual doesn't explain it?
<apritzel>
dunno for sure, but it's some generic USB PHY signal, I found this in other SoCs as well
<jernej>
anyway, I think we need special H616 handling anyway, to apply special H616 tuning
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<jernej>
aha, RK usb phy driver has explanation "Power down usb phy analog blocks by set siddq 1"
<apritzel>
well, I already tried to hack this PHYTUNE (reg +0x18) in, but it didn't make a difference, at least functionality wise
<apritzel>
(didn't do any performance tests, though)
<jernej>
it could be reliability issue
<jernej>
or performance
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<jernej>
apritzel: with yours h616-v4 branch USB still doesn't work for me on OPi 0+
<jernej>
usb 4-1: device not accepting address 4, error -62
<jernej>
even if I enable all ports, nothing works
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<hexdump0815>
jernej: i got the exact same error until i enabled ehci0-3 and ohci0-3
<jernej>
as I said, I did and still the same
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<jernej>
hexdump0815: do you have U-Boot binary you're using for USB testing at hand?
<jernej>
U-Boot is the only real difference, I'm using old port...
<hexdump0815>
oh sorry - i did not compile the opi zero 2 one - this is mainline
<jernej>
apritzel: do you have U-Boot binary at hand? I want to have same setup as you, maybe there is something in U-Boot or TF-A, which makes USB work for your
<hexdump0815>
the x96q should work for your t95 as well i think - let me check, maybe i can build a opi zero 2 one for you as well
<hexdump0815>
this one i just built using the opizero2 config :)
<jernej>
ah, sorry
<jernej>
USB works in Linux with that one?
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<hexdump0815>
its built from the same sources as the one i'm using on the x96q box, so it should work, but i did (and can not) test it on an opi zero 2 (none here)
<jernej>
ok, I made it work, my changes were at fault
<apritzel>
jernej: was just about to send you my binary ...
<jernej>
hexdump0815, apritzel: BSP DTs have all USB controllers enabled, so I guess this issue is masked
<apritzel>
jernej: yeah, good point. Are those are some generic DTs, or is there a specific one for the OPi Zero2?