sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<sb0> rjo, yes, the top of the text is fine
<whitequark> sb0: is the OR1K FPU that bad?..
<whitequark> I'm sure there should be some decent FOSS FPU
<whitequark> LLVM doesn't support FP for OR1K either but that one is easy to fix. I'll even throw in vector instructions while I'm at it
<whitequark> it's 1-2 days of work
<GitHub41> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/vVkAz
<GitHub41> artiq/master ce57794 Sebastien Bourdeauducq: doc: fix comment about when and how DDS init should be done. Closes #353
<GitHub14> [artiq] sbourdeauducq pushed 1 new commit to release-1: https://git.io/vVkAw
<GitHub14> artiq/release-1 74b71e5 Sebastien Bourdeauducq: doc: fix comment about when and how DDS init should be done. Closes #353
<sb0> whitequark, it probably is, yes. most FOSS HDL is lousy, including (and especially) in hyped projects like risc-v.
<sb0> what I expect is a multiplication of the CPU size by 4 or 5, a reduction of the maximum clock frequency by 2, and a number of functional bugs
<sb0> this is pretty standard fare for opencores code
<bb-m-labs> build #254 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/254
<sb0> whitequark, would llvm easily support a mini-FPU that could only do e.g. multiplication and addition?
<sb0> that should be easier to get to work properly than the whole package that does division, square root, exponentiation, etc.
<bb-m-labs> build #72 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/72
<whitequark> sb0: yes, trivially
<sb0> whitequark, the hardware unittests are skipped now
<sb0> no ARTIQ_ROOT
<sb0> why?
<whitequark> not a faintest clue
<bb-m-labs> build #501 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/501
<whitequark> let's see
<sb0> well you enabled -v recently. didn't you break that also?
<whitequark> they aren't
<whitequark> there are two unittest invocations
<sb0> ah yes, sorry, was looking at the first test series
<whitequark> the first is done before building the bitstream, to bail out early if there's a stupid bug
<sb0> dds is still at 300us for two
<sb0> where is that 36us figure in your email from?
<sb0> ack
<whitequark> from this test: http://hastebin.com/ukeborifox.py
<whitequark> and manual manipulation of LLVM IR as-if it was emitted for LLVM 3.6
<sb0> ok, well if it's not user-ready then it should not be in the report
<whitequark> I did not give you any not user-ready figures...
<whitequark> er
<whitequark> *36*us?
<whitequark> that was not for PulseRateDDS at all
<whitequark> that was for the issue I mentioned, open it
<whitequark> and 36us is the old figure
<sb0> ok, understood
<GitHub43> [artiq] sbourdeauducq pushed 1 new commit to release-1: https://git.io/vVkhN
<GitHub43> artiq/release-1 e6da8f7 Sebastien Bourdeauducq: doc/dds: fix init timing margin
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<mithro> sb0: I think I still owe you some documentation about the CSR stuff in misoc?
<sb0> yes, that would be nice :)
<mithro> sb0: It's sitting in my branch, I still need to clean it up a little
<mithro> sb0: This tutorial is out of date, right? https://m-labs.hk/migen/tutorial.pdf
<sb0> yes
<whitequark> sb0: lol
<sb0> what?
<whitequark> for or1k there's an mfspr function
<whitequark> __asm__ __volatile__ ("l.mfspr %0,r0,%1" : "=r" (ret) : "K" (add));
<whitequark> it has this assembly
<whitequark> it cannot possibly work. %1 has to be an immediate and `add` is an argument.
<whitequark> I upgraded clang to 3.6 and it rightfully rejected this code
<sb0> whitequark, see comment above about FOSS HDL
<whitequark> no, this was a bug in clang (that made it accept this) and a bug in libbase, which you wrote
<mithro> sb0: I'm trying to figure out what the "smallest" migen/misoc code is which still simulates all the stages in a normal full migen/misoc workflow, say a little LED blinker which can end up running on a real hardware...
<whitequark> at least, git blame says so.
<sb0> that's stuff I copy pasted...
<whitequark> amazing
<whitequark> did they run that code at all?..
<sb0> mithro, the tutorial, after renaming some modules or function calls, should be essentially right
<sb0> whitequark, gcc compiled it as well, I think
<whitequark> I suspect the reason this never angered compilers was that neither gcc nor clang complain about inline functions that are never used
<whitequark> well, clang before 3.6
<whitequark> hang on
<whitequark> mailbox.c has an instance...
<whitequark> wtf
<whitequark> sb0: can you show me the assembly for mfspr(1) ?
<whitequark> (I reinstalled my local compiler to 3.6 and don't want to recompile)
<whitequark> nvm, I can just use lab.
<sb0> whitequark, btw I notice that the new kc705 power connector appears to be reliable. so the solution to this problem is to replace the connectors on the mains adapters.
<whitequark> yes.
<whitequark> sb0: shall I change the inline function to a macro, or change the inline assembly to use a base register and not this stupid immediate trick?
<whitequark> I think it works by accident, because the compiler happens to constant-fold it most of the time
<sb0> macro is easier no?
<whitequark> both are easy
<whitequark> the second is changing an operand and a constraint
<sb0> i'll keep the macro to be closest to the original code
<whitequark> ok
<whitequark> hm
<whitequark> annoying. you cannot make an asm statement return a value
<whitequark> I think there was some horrible gcc extension, but it's pretty silly to replace one horrible GCC extension with another
<whitequark> wait, what
<whitequark> the clang in our miniconda refuses to compile it either
<whitequark> right. you need -O1.
<whitequark> this is amazing
<whitequark> it's literally impossible to compile that function at -O0
<sb0> ysionneau, you didn't answer my question about the presence of the is_moving() function in the thorlabs driver
<sb0> oh, actually it has one (limited) use, it returns True when the user is touching the buttons
<GitHub35> [artiq] sbourdeauducq pushed 2 new commits to master: https://git.io/vVImS
<GitHub35> artiq/master 5088886 Sebastien Bourdeauducq: doc/dds: fix init timing margin
<GitHub35> artiq/master 3c09577 Sebastien Bourdeauducq: device/thorlabs_tcube: fix port read
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<GitHub158> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/vVIYD
<GitHub158> artiq/master 1a51363 Sebastien Bourdeauducq: doc/tutorial: add missing type annotation in LED example. Closes #356
<GitHub28> [artiq] sbourdeauducq pushed 1 new commit to release-1: https://git.io/vVIYS
<GitHub28> artiq/release-1 1884b22 Sebastien Bourdeauducq: doc/tutorial: add missing type annotation in LED example. Closes #356
<bb-m-labs> build #255 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/255
<bb-m-labs> build #256 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/256
<bb-m-labs> build #73 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/73
<bb-m-labs> build #502 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/502
<bb-m-labs> build #74 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/74
<bb-m-labs> build #503 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/503
<whitequark> sb0: why did you stop linking makefiles into the misoc build tree?
<whitequark> it's now extremely annoying to debug
<sb0> I didn't - that was Robert and/or Florent's idea. the reason is windows support.
<whitequark> can we keep doing that on *nix?
<sb0> not really, Florent is a major contributor to misoc and doesn't use *nix
<whitequark> I don't see how is adding a symlink only if os=='unix' is a problem
<sb0> oh, in that sense. yes.
<whitequark> it won't acually be used during build
<sb0> you can even use it during build
<sb0> just remove the -f argument to make on unix
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<sb0> whitequark, shouldn't setattr_device update kernel_constant_attributes?
<sb0> typically, devices are not changed dynamically
<whitequark> yes, I've considered that
<whitequark> if you know how to implement that well, please do
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<GitHub15> [artiq] sbourdeauducq pushed 2 new commits to master: https://git.io/vVI4T
<GitHub15> artiq/master a545598 Sebastien Bourdeauducq: style
<GitHub15> artiq/master 84d50c4 Sebastien Bourdeauducq: environment,worker_db: mutate datasets from experiments via dedicated method instead of Notifier. Closes #345
<sb0> whitequark, how does the compiler read it? getattr(object, "kernel_constant_attributes", set())?
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<whitequark> not the object. the class.
<sb0> ok. that was my question :)
<whitequark> btw all our tests pass with LLVM 3.6
<whitequark> so I think I'll proceed and push it...
<sb0> whitequark, ok. we still have a bit of time before 1.0-final, and in the meantime there will still be the old package in the main branch
<sb0> *channel
<sb0> whitequark, so. if it's the class, updating from setattr_device is somewhat dirty
<sb0> and if I understand that right - if the user simply does self.setattr_device("dds0") without using kernel_constant_attributes, then they get lousy performance, right?
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<whitequark> yes. that's why i didn't do it.
<whitequark> well, it will be somewhat worse
<whitequark> it's not completely lost. you will get a few pointer loads and some kept FP.
<whitequark> but FP will be hoisted out of the loop etc
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<sb0> hmm
<sb0> what's wrong with loading kernel_constant_attributes from the object, not the class?
<sb0> the first object is given to you upon @kernel invokation, then you can trace other objects that are also in kernel_constant_attributes ...
<whitequark> the class is the type, and constness is the property of the type
<sb0> whitequark, also, kernel_constant_attributes should be documented
<sb0> it's not right now, right?
<whitequark> it's not
<sb0> I tend to think altering the class in setattr_device isn't that bad. it solves the practical user problem...
<bb-m-labs> build #257 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/257
<sb0> this hack is simple enough and easily documented, and get_device is always available in cases where it breaks something
<bb-m-labs> build #504 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/504 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<sb0> weird, I can ping it now
<whitequark> I left flterm open
<whitequark> that's why it broke
<sb0> ah, this old problem
<whitequark> lol I can't push openrisc
<whitequark> the shitty ADSL I have makes the SSH connection drop before it even gets to 10%
<whitequark> and then git restarts from scratch
<whitequark> amazing
<whitequark> hm, there's a large problem with llvmlite-artiq
<whitequark> it doesn't have a version constraint on llvm
<GitHub119> [conda-recipes] whitequark pushed 1 new commit to master: https://github.com/m-labs/conda-recipes/commit/439d4617e3f3bd1999159305bcb3d02350b32b50
<GitHub119> conda-recipes/master 439d461 whitequark: llvmlite-artiq: add version constraint.
<whitequark> bb-m-labs: force build --props=package=llvmlite-artiq conda-all
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #23 forced
<bb-m-labs> build #114 of conda-lin64 is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/conda-lin64/builds/114
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<whitequark> gah
<GitHub96> [conda-recipes] whitequark force-pushed master from 439d461 to d192b5e: https://github.com/m-labs/conda-recipes/commits/master
<GitHub96> conda-recipes/master d192b5e whitequark: llvmlite-artiq: add version constraint.
<whitequark> bb-m-labs: force build --props=package=llvmlite-artiq conda-all
<bb-m-labs> build #24 forced
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #115 of conda-lin64 is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/conda-lin64/builds/115
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<bb-m-labs> build #24 of conda-all is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/conda-all/builds/24
<whitequark> bb-m-labs: force build --props=package=llvmlite-artiq conda-all
<bb-m-labs> build #25 forced
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #116 of conda-lin64 is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/conda-lin64/builds/116
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<GitHub99> [conda-recipes] whitequark force-pushed master from d192b5e to b51bf71: https://github.com/m-labs/conda-recipes/commits/master
<GitHub99> conda-recipes/master b51bf71 whitequark: llvmlite-artiq: add version constraint.
<whitequark> bb-m-labs: force build --props=package=llvmlite-artiq conda-all
<bb-m-labs> build #26 forced
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #117 of conda-lin64 is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/conda-lin64/builds/117
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<GitHub160> [artiq] sbourdeauducq pushed 2 new commits to master: https://git.io/vVIze
<GitHub160> artiq/master b6232ae Sebastien Bourdeauducq: gui: better default layout
<GitHub160> artiq/master b59283f Sebastien Bourdeauducq: gui/applets: use a better default size, make minimum size proportional to font
<GitHub144> [artiq] sbourdeauducq pushed 3 new commits to release-1: https://git.io/vVIzq
<GitHub144> artiq/release-1 ac0f626 Sebastien Bourdeauducq: environment,worker_db: mutate datasets from experiments via dedicated method instead of Notifier. Closes #345
<GitHub144> artiq/release-1 ddf6ec4 Sebastien Bourdeauducq: gui: better default layout
<GitHub144> artiq/release-1 7cff497 Sebastien Bourdeauducq: gui/applets: use a better default size, make minimum size proportional to font
<sb0> rjo, shouldn't the other spinboxes be scientific spinboxes?
<sb0> I mean _NumberEntry
<bb-m-labs> build #258 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/258
<bb-m-labs> build #505 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/505 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<GitHub140> [misoc] whitequark pushed 1 new commit to master: https://git.io/vVI2P
<GitHub140> misoc/master 9fd5840 whitequark: software: fix broken OR1K inline assembly....
<bb-m-labs> build #87 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/87
<GitHub25> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/vVIaQ
<GitHub25> artiq/master dc2c19f Sebastien Bourdeauducq: gui/schedule: support terminating all experiments in a pipeline. Closes #262
<bb-m-labs> build #259 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/259
<bb-m-labs> build #506 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/506
<rjo> sb0: I didn't because _NumberEntry seemed to be usable for integers as well where Range is inherently less usable. And the scientific spinbox is not much fun for integers.
<rjo> but in general. there is still a lot that can be done for physicist-friendly numbers entry. the scientificspinboxes are not perfect at all.
<bb-m-labs> build #260 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/260
<bb-m-labs> build #507 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/507 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<GitHub106> [conda-recipes] whitequark pushed 1 new commit to master: https://github.com/m-labs/conda-recipes/commit/6fb6b0968348c2dc4b9f284eedc5c56ae6e3d4fa
<GitHub106> conda-recipes/master 6fb6b09 whitequark: llvm-or1k: update to 3.6.2.
<whitequark> bb-m-labs: force build --props=package=llvm-or1k conda-all
<bb-m-labs> build forced [ETA 4m09s]
<bb-m-labs> I'll give a shout when the build finishes
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<rjo> sb0: there is also the prototyping rf daughter card. in general one that really doesn't do much with the dac outputs/adc inputs.
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<whitequark> hm, so if I migrate to LLVM 3.7 right away then we can use upstream llvmlite.
<whitequark> appealing
<whitequark> I mean, as appealing as "using llvmlite" can ever be, I gues
<GitHub176> [conda-recipes] whitequark pushed 1 new commit to master: https://github.com/m-labs/conda-recipes/commit/ab9f1b2760161934877883fe2083d34f08c89c83
<GitHub176> conda-recipes/master ab9f1b2 whitequark: llvmlite-artiq: bump.
<whitequark> bb-m-labs: force build --props=package=llvmlite-artiq conda-all
<bb-m-labs> build forced [ETA 43m31s]
<bb-m-labs> I'll give a shout when the build finishes
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<whitequark> bb-m-labs: force build --props=package=llvmlite-artiq conda-all
<bb-m-labs> build forced [ETA 43m31s]
<bb-m-labs> I'll give a shout when the build finishes
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<GitHub140> [conda-recipes] whitequark pushed 1 new commit to master: https://github.com/m-labs/conda-recipes/commit/636be363518ad1ec669f55472b6898be361b5b1c
<GitHub140> conda-recipes/master 636be36 whitequark: llvmlite-artiq: bump.
<whitequark> bb-m-labs: force build --props=package=llvmlite-artiq conda-all
<bb-m-labs> build forced [ETA 43m31s]
<bb-m-labs> I'll give a shout when the build finishes
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<GitHub161> [artiq] whitequark pushed 3 new commits to master: https://git.io/vVLkP
<GitHub161> artiq/master a948924 whitequark: llvm_ir_generator: don't mark non-constant attribute loads as invariant....
<GitHub161> artiq/master f6b391b whitequark: compiler: fix ARTIQ_DUMP_ELF.
<GitHub161> artiq/master 60c2140 whitequark: llvm_ir_generator: mark loads as non-null where applicable.
<bb-m-labs> build #508 of artiq is complete: Failure [failed lit_test] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/508 blamelist: whitequark <whitequark@whitequark.org>
<GitHub42> [artiq] whitequark force-pushed master from 60c2140 to c68bf13: https://git.io/vYgPK
<GitHub42> artiq/master a0e34fb whitequark: llvm_ir_generator: mark loads as non-null where applicable.
<GitHub42> artiq/master c68bf13 whitequark: test: relax lit/embedding/syscall_flags....
<GitHub187> [misoc] enjoy-digital pushed 1 new commit to master: https://git.io/vVLLV
<GitHub187> misoc/master 42e17a4 Florent Kermarrec: cores/sdram_phy: update S6QuarterRateDDRPHY to new migen
<bb-m-labs> build #88 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/88
<GitHub110> [buildbot-config] whitequark pushed 1 new commit to master: https://github.com/m-labs/buildbot-config/commit/115076a41b271ea7b860246d12b0bcc15b4139d4
<GitHub110> buildbot-config/master 115076a whitequark: Limit concurrency via locks *and* max_builds....
<bb-m-labs> build #261 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/261
<mithro> whitequark: You created https://github.com/jordens/unrandom/commits/master right? I'm currently looking at some ISE traces and it appears to be reading from /dev/urandom - any idea how to do a similar thing to make /dev/urandom reads pseudo-random?
<whitequark> rm /dev/urandom; cp /dev/zero /dev/urandom
<mithro> whitequark: I would like to only do that for ISE :P
<mithro> guess I could stuff it into a container
<whitequark> hook `open`
<whitequark> just like unrandom does
<whitequark> or a container, yes
<mithro> Well, I guess if I hook it to open /dev/zero rather then /dev/urandom that is pretty easy - but I wonder if something would depend on it being more than just a sequence of zeros...
<whitequark> there's a nonzero probability...
<mithro> baboom-tish
<GitHub163> [artiq] whitequark force-pushed master from c68bf13 to 5860220: https://git.io/vYgPK
<GitHub163> artiq/master 330b232 whitequark: test: relax lit/embedding/syscall_flags....
<GitHub163> artiq/master 5860220 whitequark: llvm_ir_generator: mark loads as non-null where applicable.
<mithro> I think it's just using it to create a tmp file name
<bb-m-labs> build #262 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/262
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<bb-m-labs> build #263 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/263
<bb-m-labs> build #511 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/511 blamelist: whitequark <whitequark@whitequark.org>
<whitequark> static int
<whitequark> or it's not guaranteed to be zero
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<whitequark> needs to be fixed above too
<whitequark> otherwise: yes
<mithro> whitequark: why does the test pass without that?
<whitequark> luck
<mithro> hrm, ISE is now creating files with a weird set of permissions....
<mithro> whitequark: open has both a 2 argument and 3 argument versions?
<whitequark> one of those is a macro
<whitequark> oh
<whitequark> int open(const char *path, int oflag, ... );
<mithro> whitequark: hrm?
<mithro> ... means va_args right?
<mithro> Currently looking at https://github.com/poliva/ldpreloadhook/blob/master/hook.c -- turns out I know half thoses authors...
<whitequark> yes
<GitHub147> [migen] jordens pushed 2 new commits to master: https://git.io/vVLBL
<GitHub147> migen/master a2a1c30 Robert Jordens: bitcontainer: handle unary ops (closes #44)
<GitHub147> migen/master 408a85f Robert Jordens: bitcontainer: handle Mux (closes #46)
<bb-m-labs> build #67 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/67
<bb-m-labs> build #89 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/89
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<bb-m-labs> build #264 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/264
<bb-m-labs> build #512 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/512
<mithro> whitequark: there seems to be a child process which is escaping the LD_PRELOAD and I'm not sure how
<whitequark> different bitness?
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<mithro> whitequark: I don't think so, the same process is opening /lib/x86_64-linux-gnu/libexpat.so.1
<mithro> The confusing part is it seems to have been loaded
<mithro> so, I wonder if this open call is somehow different to the other one.....
<whitequark> there is only one open symbol
<whitequark> since C doesn't have overloading
<mithro> That is the non-working one, when it works it prints out "redirection urandom" like 20 times
<mithro> Will have to look at it more tomorrow
<mithro> Should be in bed hours ago
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<GitHub67> [artiq] whitequark pushed 1 new commit to master: https://git.io/vVLim
<GitHub67> artiq/master 8a908a7 whitequark: llvm_ir_generator: do not use 'coldcc' calling convention....
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<bb-m-labs> build #513 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/513 blamelist: whitequark <whitequark@whitequark.org>
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<sb0> rjo, the breakout card?
<sb0> I didn't remove it from the document
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<rjo> sb0_: ack. i overlooked that.
<sb0_> whitequa1k, $ sudo xl start /var/vms/win7-experimental.cfg
<sb0_> command not implemented
<GitHub106> [artiq] sbourdeauducq pushed 2 new commits to master: https://git.io/vVt36
<GitHub106> artiq/master 6011444 Sebastien Bourdeauducq: gui: log error and bail out on artiq_gui.pyon write failure (#360)
<GitHub106> artiq/master 010c68f Sebastien Bourdeauducq: Merge branch 'master' of github.com:m-labs/artiq
<GitHub72> [artiq] sbourdeauducq pushed 1 new commit to release-1: https://git.io/vVt3M
<GitHub72> artiq/release-1 b64cea0 Sebastien Bourdeauducq: gui: log error and bail out on artiq_gui.pyon write failure (#360)
<GitHub53> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/vVtsm
<GitHub53> artiq/master 059aa2f Sebastien Bourdeauducq: gui: do 60114447 properly
<GitHub195> [artiq] sbourdeauducq pushed 1 new commit to release-1: https://git.io/vVts3
<GitHub195> artiq/release-1 72da5cc Sebastien Bourdeauducq: gui: do 60114447 properly
<bb-m-labs> build #266 of artiq-kc705-nist_clock is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_clock/builds/266
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<whitequa1k> sb0_: sudo xl create
whitequa1k is now known as whitequark
<whitequark> right, it's still being too slow on that test, after i fixed a bug in the compiler...
<whitequark> this should get fixed once llvm 3.7 is in