sb0 changed the topic of #m-labs to: https://m-labs.hk :: Logs http://irclog.whitequark.org/m-labs :: Due to spam bots, only registered users can talk. See: https://freenode.net/kb/answer/registration
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<GitHub-m-labs> [migen] whitequark pushed 1 new commit to master: https://github.com/m-labs/migen/commit/7303a8a8d78262a279196c3770d6c0d44c84c58e
<GitHub-m-labs> migen/master 7303a8a whitequark: build/platforms/versaecp55g: add PCIe pins.
<bb-m-labs> build #330 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/330
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<hartytp> sb0: I'm finishing up testing on switching now
<hartytp> I'm really impressed
<hartytp> nothing to fault so far (apart from docs needing beefing up)
<hartytp> nice job!
<hartytp> before signig off on it, I'd like to try running an experiment on it. Can you rebase to current master so I can do that (e.g. I'll need the new urukul driver to do anything with it)
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<GitHub-m-labs> [artiq] jordens pushed 3 new commits to master: https://github.com/m-labs/artiq/compare/9740032a9410...38c6878d498d
<GitHub-m-labs> artiq/master 38c6878 Robert Jördens: urukul: mention min/max attenuation...
<GitHub-m-labs> artiq/master e565ca6 Robert Jördens: urukul: slow down att write to datasheet limit...
<GitHub-m-labs> artiq/master 998be50 Robert Jördens: urukul: handle MSB in att_reg...
<hartytp> rjo: cool, thanks. "handle MSB in att_reg..." was one of the next things on my to do list
<sb0> hartytp: use the "new" branch at fcb611d1d2ccb7b69feb1a4eb9d1e46dc564601a
<sb0> or just the new branch, but then you'll be testing the new rtio csr interface as well )
<sb0> hm, wait, that commit id may not be what you want
<sb0> hartytp: just copy the new urukul driver files? afaik nothing else is changed
<bb-m-labs> build #1998 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1998
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<hartytp> sb0: there are a few other things that have changed. I can cherry pick, but it's a bit of a pain. In any case, we should merge switching soon, so will need to rebase anyway...
<sb0> hartytp: try new. i want to merge that one instead (and it should be mergeable automatically...)
<sb0> in general I get a bit paranoid about merges, since there have been a few annoying bugs stemming from improperly done merges, so I try to reduce the amount of merges
<sb0> as long as you don't interrupt kernels, there shouldn't be issues with the new branch right now
<bb-m-labs> build #1999 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1999
<bb-m-labs> build #2677 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2677
<hartytp> sb0: okay. when will new be merged?
<hartytp> ideally I'd like to test out switching in an actual experiment before signing off on it since that often picks up bugs that don't show up in simple test setups
<sb0> as soon as possible. depends on llvm issues, mostly.
<hartytp> but to run an experiment on it, I need something that's compatible with other code, which requires more or less parity with master
<hartytp> okay, well, I can wait a week, maybe two if that helps. after that I really want to sign off on it
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<hartytp> what's the timeline for the SDRAM issue?
<sb0> hartytp: just use new. or merge it yourself.
<sb0> _florent_: ^
<hartytp> sb0: how confident are you that new won't raise other unexpected issues? It would be nice to test out one modification at a time
<hartytp> basically, I'd consider merging the changes into master to be part of the contract. I expect to sign off on it promptly after that is done, assuming a check test on my experiment doesn't turn up anything unexpected
<sb0> hartytp: the contract is for switching, not functional combinations of whatever artiq commits you want. the deliverable is the switching branch, and then switching125 since you insisted on a merge already.
<hartytp> So long as it's merged into master, I'm happy
<hartytp> (IIRC there were two components of the contract, a switching component and an integration with Kasli component. even if mergin into master isn't covered with the first of those, I would have expected it to be covered by the latter)
<sb0> it will get merged eventually, but your requests for various commit combinations/merges create extra work
<_florent_> hartytp, sb0: sorry i was busy, i will look at kasli SDRAM on next Monday/Tuesday
<hartytp> _florent_ ack
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<hartytp> sb0: understood. But, having the changes merged with master before I sign off on them doesn't seem unreasonable (otherwise, what's the point of an integration contract?). If you want to put that off a bit, that's fine. But, testing one major change at a time does seem sensible to make bug tracking easier
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<sb0> hartytp: it is integrated with kasli in the switching, switching125, and new branches.
<GitHub-m-labs> [artiq] hartytp commented on issue #790: Dumb throughput test... https://github.com/m-labs/artiq/issues/790#issuecomment-437367710
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<sb0> the artiq release process is something different.
<rjo> bb-m-labs: force build --props=package=artiq-board,artiq_target=kasli,artiq_variant=ptb artiq-board
<bb-m-labs> build forced [ETA 17m12s]
<bb-m-labs> I'll give a shout when the build finishes
<rjo> bb-m-labs: force build --props=package=artiq-board,artiq_target=kasli,artiq_variant=ptb2 artiq-board
<bb-m-labs> The build has been queued, I'll give a shout when it starts
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<sb0> bb-m-labs: force build --branch=new artiq
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<GitHub-m-labs> [artiq] sbourdeauducq pushed 2 new commits to new: https://github.com/m-labs/artiq/compare/c990b5e4f18e...1f7858b80b62
<GitHub-m-labs> artiq/new 1f7858b Sebastien Bourdeauducq: test/dsp: fix rtio_output
<GitHub-m-labs> artiq/new e509ab8 Sebastien Bourdeauducq: test/dsp: use absolute import path...
<bb-m-labs> build #2000 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2000
<bb-m-labs> build forced [ETA 17m13s]
<bb-m-labs> I'll give a shout when the build finishes
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<bb-m-labs> build #2001 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2001
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<bb-m-labs> build #2002 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2002
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<bb-m-labs> build #2003 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2003
<bb-m-labs> build #2678 of artiq is complete: Exception [exception python_unittest_2 board_unlock_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2678 blamelist: Robert J?rdens <rj@quartiq.de>
<bb-m-labs> build forced [ETA 1h05m36s]
<bb-m-labs> I'll give a shout when the build finishes
<rjo> bb-m-labs: force build --props=package=artiq-board,artiq_target=kasli,artiq_variant=opticlock artiq-board
<bb-m-labs> build forced [ETA 16m47s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #2004 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2004
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<bb-m-labs> build #2005 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2005
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<bb-m-labs> build #2006 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2006
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<bb-m-labs> build #2679 of artiq is complete: Exception [exception python_unittest_2 board_unlock_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2679
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<GitHub-m-labs> [artiq] jordens pushed 2 new commits to master: https://github.com/m-labs/artiq/compare/fe3d6661ebf1...e92755182745
<GitHub-m-labs> artiq/master e927551 Robert Jördens: manual: add highfinesse-net port
<GitHub-m-labs> artiq/master 14b6b63 Robert Jördens: ad9910: rewire io_delay tuning...
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<bb-m-labs> build #2007 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2007
<bb-m-labs> build #2008 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2008
<bb-m-labs> build #2680 of artiq is complete: Exception [exception python_unittest_2 board_unlock_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2680 blamelist: Robert J?rdens <rj@quartiq.de>
<bb-m-labs> build #2009 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2009
<bb-m-labs> build #2010 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2010
<bb-m-labs> build #2681 of artiq is complete: Exception [exception python_unittest_2 board_unlock_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2681 blamelist: Robert J?rdens <rj@quartiq.de>
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