00:15 <cr1901_modern> whitequark: http://www.sunburst-design.com/papers/CummingsSNUG2003Boston_Resets.pdf Page 20, in huge bold lol

00:16 <whitequark> I mean, duh

00:16 <whitequark> any asynchronous input must be synchronized

00:17 <whitequark> this is kind of obvious

00:19 <cr1901_modern> I suppose... just found it amusing how it was typeset

00:19 <cr1901_modern> in bold, in caps. Like if you miss this it's your fault

01:56 <GitHub-m-labs> [artiq] dhslichter commented on issue #1142: But can one wrap the physical layer specifications for each in some sensible way, and just make a DDS state machine that will be suitably track a simplified set of parameters (frequency with 32-bit FTW only, amplitude scale factor) and enable those to be overridden by injection? AFAICT the only thing one would want to do with injection would be to set frequency or a

02:07 <GitHub-m-labs> [artiq] dhslichter commented on issue #1142: But can one wrap the physical layer specifications for each in some sensible way, and just make a DDS state machine that will suitably track a simplified set of parameters (frequency with 32-bit FTW only, amplitude scale factor) and enable those to be overridden by injection? AFAICT the only thing one would want to do with injection would be to set frequency or ampl

07:34 <mithro> Any idea why the clear signal is not working in simulation here?

07:34 <mithro> https://www.irccloud.com/pastebin/iiR04JEe/

07:55 <whitequark> is clear driven from somewhere else?

07:55 <whitequark> in that case the simulator silently discards `yield x.eq

16:04 <GitHub-m-labs> [artiq] bradbqc commented on issue #1064: @marmeladapk Yes, except the flash failed, citing "Error: Cannot enable write to flash. Status=0x00000000." I'll try erasing and re-flashing and report back https://github.com/m-labs/artiq/issues/1064#issuecomment-442889179

17:38 <GitHub-m-labs> [artiq] jbqubit opened issue #1200: NXP firmware update via artiq_flash https://github.com/m-labs/artiq/issues/1200

17:43 <GitHub-m-labs> [artiq] bradbqc commented on issue #1064: I've discovered that part (if not all) of the reason I'm unable to flash is that the mmc is restarting every minute (pretty much exactly 60s, as far as I can tell) for some reason. I noticed a very brief dip in the current sayma was drawing and so I looked at the mmc serial output. It is repeatedly printing ... https://github.com/m-labs/artiq/issues/1064#issuecommen

19:32 <GitHub-m-labs> [artiq] gkasprow commented on issue #1064: @bradbqc do you use one or two power units at the time ?... https://github.com/m-labs/artiq/issues/1064#issuecomment-442963491

21:19 <GitHub-m-labs> [artiq] sbourdeauducq commented on issue #1064: @bradbqc @gkasprow MMC and µTCA bugs are a different issue. https://github.com/m-labs/artiq/issues/1064#issuecomment-442996747

21:21 <GitHub-m-labs> [artiq] sbourdeauducq commented on issue #1064: @bradbqc @gkasprow MMC and µTCA bugs are a different issue.... https://github.com/m-labs/artiq/issues/1064#issuecomment-442996747

21:27 <marmelada> sb0: brad is already using external power supply, reboots happen on bench otp

21:27 <marmelada> *top

21:27 <marmelada> so MTCA trash has nothing to do here this time

22:25 <kbeckmann> I'm trying to use a PLL on ice40/glasgow with migen to output a clock on a pin and getting some annoying errors. I'm doing the following: https://gist.github.com/kbeckmann/03131ebdab6ca4235f114432c2640f29 Am I doing something obviously wrong?

22:26 <whitequark> kbeckmann: the PLL on UP5K is weird

22:26 <kbeckmann> oh

22:27 <whitequark> first, if you use it, you lose one of the pins

22:27 <whitequark> one of the IO pins becomes either an input-only or output-only, I don't recall which it is exactly

22:28 <kbeckmann> ok, i guess in my case that's fine since i have quite a few free and only want to output the raw clock on a pin.

22:28 <kbeckmann> uhh raw pll clock i mean of course.

22:28 <whitequark> why do you want to use a PLL to generate a 24 MHz clock?

22:29 <whitequark> actually nevermind, stupid question

22:29 <kbeckmann> reviving a broken ice40 devkit, oscillator broke and i just wanted to try it out

22:29 <kbeckmann> i can solve it in a thousand other ways but this is more fun :D

22:29 <whitequark> I have no idea what that nextpnr message means

22:29 <whitequark> try asking nextpnr people

22:30 <whitequark> daveshah on ##openfpga?

22:30 <kbeckmann> alright, will do that. have you used plls on the up5k through migen successfully otherwise?

22:31 <whitequark> yes

22:31 <whitequark> but only on the SYNC pin

22:32 <kbeckmann> oh right! will take a look at that.

23:26 <GitHub-m-labs> [artiq] cjbe opened issue #1201: Gateware build error when instantiating multiple SUServo https://github.com/m-labs/artiq/issues/1201

23:33 <GitHub-m-labs> [artiq] cjbe opened issue #1202: Gateware build fails if there are no moninj probes https://github.com/m-labs/artiq/issues/1202