sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
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<_whitenotifier-3> [nmigen] sbourdeauducq opened issue #80: split board definitions - https://git.io/fjuTo
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<_whitenotifier-3> [nmigen] zignig opened pull request #81: fix global , and allow easy subclassing of Platform - https://git.io/fjuTj
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541033489?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] codecov[bot] commented on pull request #81: fix global , and allow easy subclassing of Platform - https://git.io/fjuke
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<mtrbot-ml_> [mattermost] <sb10q> @astro did you test the new extended-tests derivation?
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<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjuIh
<_whitenotifier-3> [m-labs/nmigen] whitequark 45d1dc1 - vendor.board.tinyfpga_bx: fix typo.
<_whitenotifier-3> [nmigen] whitequark commented on pull request #81: fix global , and allow easy subclassing of Platform - https://git.io/fjuLe
<_whitenotifier-3> [nmigen] whitequark closed pull request #81: fix global , and allow easy subclassing of Platform - https://git.io/fjuTj
<whitequark> TD-Linux: yeah, please post an MCVE as an issue
<whitequark> oh, nvm, just needs CompatModule to be fixed
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541085237?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 81% remains the same compared to 6426b90 - https://codecov.io/gh/m-labs/nmigen/commit/45d1dc1d54e79dfd66af6bc2ed0e6b267d9ffe81
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing 6426b90...45d1dc1 - https://codecov.io/gh/m-labs/nmigen/commit/45d1dc1d54e79dfd66af6bc2ed0e6b267d9ffe81
<_whitenotifier-3> [nmigen] zignig opened issue #82: Global on clock pin is unroutable - https://git.io/fjuL3
<_whitenotifier-3> [nmigen] whitequark commented on issue #82: Global on clock pin is unroutable on tinyfpga_bx platform - https://git.io/fjuLn
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjuLc
<_whitenotifier-3> [m-labs/nmigen] whitequark c89c2ce - vendor.board.tinyfpga_bx: clk16 pin does not have a global buffer.
<_whitenotifier-3> [nmigen] whitequark closed issue #82: Global on clock pin is unroutable on tinyfpga_bx platform - https://git.io/fjuL3
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541090892?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 81% remains the same compared to 45d1dc1 - https://codecov.io/gh/m-labs/nmigen/commit/c89c2ce941de3e00c4be0dcba2bc7ceb19e3727e
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing 45d1dc1...c89c2ce - https://codecov.io/gh/m-labs/nmigen/commit/c89c2ce941de3e00c4be0dcba2bc7ceb19e3727e
<_whitenotifier-3> [nmigen] zignig commented on issue #82: Global on clock pin is unroutable on tinyfpga_bx platform - https://git.io/fjuL0
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<_whitenotifier-3> [nmigen] whitequark commented on issue #80: split board definitions - https://git.io/fjutB
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+1/-0/±1] https://git.io/fjutP
<_whitenotifier-3> [m-labs/nmigen] whitequark 3194b5c - build.run: extract from build.plat.
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541113190?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 81.02% (+0.01%) compared to c89c2ce - https://codecov.io/gh/m-labs/nmigen/commit/3194b5c90ba8bc22b600e25ab619dcac2582d476
<_whitenotifier-3> [nmigen] Failure. 35.55% of diff hit (target 81%) - https://codecov.io/gh/m-labs/nmigen/commit/3194b5c90ba8bc22b600e25ab619dcac2582d476
<_whitenotifier-3> [nmigen] whitequark commented on pull request #46: [WIP] Add nmigen.build - https://git.io/fjutM
<_whitenotifier-3> [nmigen] sbourdeauducq commented on issue #80: split board definitions - https://git.io/fjutS
<_whitenotifier-3> [GitHub] Design for failure.
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±9] https://git.io/fjutp
<_whitenotifier-3> [m-labs/nmigen] whitequark 9f643ce - Clean up imports.
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541121319?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 81.02% (+<.01%) compared to 3194b5c - https://codecov.io/gh/m-labs/nmigen/commit/9f643ce0059daa9aaec6921363db04b3b62a1ef1
<_whitenotifier-3> [nmigen] Success. 100% of diff hit (target 81.02%) - https://codecov.io/gh/m-labs/nmigen/commit/9f643ce0059daa9aaec6921363db04b3b62a1ef1
<TD-Linux> whitequark, ok. lmk if you still want me to file an issue
<TD-Linux> you're flying with the nmigen.build improvements :)
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<whitequark> TD-Linux: actually, i do
<TD-Linux> k one sec
<whitequark> i'll be able to fix it faster if someone else writes a testcase
<_whitenotifier-3> [nmigen] tdaede opened issue #83: Compat Modules cannot be elaborated - https://git.io/fjuqC
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<_whitenotifier-3> [nmigen-boards] whitequark created branch master - https://git.io/fjuYk
<_whitenotifier-3> [m-labs/nmigen-boards] whitequark pushed 1 commit to master [+14/-0/±0] https://git.io/fjuYI
<_whitenotifier-3> [m-labs/nmigen-boards] whitequark ab52884 - Extract from nMigen.
<_whitenotifier-3> [m-labs/nmigen-boards] whitequark pushed 1 commit to master [+14/-0/±0] https://git.io/fjuYt
<_whitenotifier-3> [m-labs/nmigen-boards] whitequark 50403d6 - Extract from nMigen.
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 3 commits to master [+1/-8/±8] https://git.io/fjuYY
<_whitenotifier-3> [m-labs/nmigen] whitequark 2763b40 - build.res: simplify emission of port constraints on individual bits.
<_whitenotifier-3> [m-labs/nmigen] whitequark 316ba10 - build.run: simplify using build products locally, e.g. for programming.
<_whitenotifier-3> [m-labs/nmigen] whitequark 1b54eb8 - vendor.board: split off into nmigen-boards package.
<_whitenotifier-3> [nmigen] whitequark closed issue #80: split board definitions - https://git.io/fjuTo
<_whitenotifier-3> [nmigen-boards] whitequark opened issue #1: `python -m nmigen_boards.<board>` should build and program blinky - https://git.io/fjuY3
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541156705?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Failure. 80.74% (-0.29%) compared to 9f643ce - https://codecov.io/gh/m-labs/nmigen/commit/1b54eb80da1153987240710d5411623eebe68ab0
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing 9f643ce...1b54eb8 - https://codecov.io/gh/m-labs/nmigen/commit/1b54eb80da1153987240710d5411623eebe68ab0
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<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±5] https://git.io/fjuYb
<_whitenotifier-3> [m-labs/nmigen] whitequark 51c03ca - hdl.xfrm: handle empty lhs in LHSGroup{Analyzer,Filter}.
<_whitenotifier-3> [m-labs/nmigen] whitequark 85efd08 - build.res: use ConstraintError iff a constraint invariant is violated.
<_whitenotifier-3> [nmigen] Failure. The Travis CI build failed - https://travis-ci.org/m-labs/nmigen/builds/541168572?utm_source=github_status&utm_medium=notification
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<whitequark> anyone has an icestick here?
<whitequark> or tinyfpga bx?
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±3] https://git.io/fjuOX
<_whitenotifier-3> [m-labs/nmigen] whitequark 4310254 - build.res: use ConstraintError iff a constraint invariant is violated.
<cr1901_modern1> whitequark: I have both
<_whitenotifier-3> [nmigen-boards] whitequark commented on issue #1: `python -m nmigen_boards.<board>` should build and program blinky - https://git.io/fjuOM
<whitequark> can you run:
<whitequark> python3 -m nmigen_boards.tinyfpga_bx
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<whitequark> python3 -m nmigen_boards.icestick
<whitequark> and verify that they're programmed and blink every LED?
<_whitenotifier-3> [nmigen-boards] whitequark deleted a comment on issue #1: `python -m nmigen_boards.<board>` should build and program blinky - https://git.io/fjuOM
<whitequark> cr1901_modern1: hang on, not pushed yet
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541181899?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.76% (+0.01%) compared to 1b54eb8 - https://codecov.io/gh/m-labs/nmigen/commit/43102541032f0bb51775bc1756fd125b984d6de8
<_whitenotifier-3> [nmigen] Success. 100% of diff hit (target 80.74%) - https://codecov.io/gh/m-labs/nmigen/commit/43102541032f0bb51775bc1756fd125b984d6de8
<whitequark> cr1901_modern1: ok, pushed
<_whitenotifier-3> [m-labs/nmigen-boards] whitequark pushed 1 commit to master [+1/-0/±3] https://git.io/fjuOH
<_whitenotifier-3> [m-labs/nmigen-boards] whitequark ecda2a1 - Blink all LEDs at 1 Hz if any board is run as __main__.
<cr1901_modern1> Okay I need to run setup.py for nmigen_boards anyway
<cr1901_modern1> I don't have a nextpnr w/ heap placer enabled- lemme quickly hack that out
<whitequark> you can use NMIGEN_nextpnr_opts="" ...
<whitequark> e.g. `NMIGEN_nextpnr_opts="" python3 -m nmigen_boards.icestick`
<cr1901_modern1> Ahhh perfect
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+1/-0/±1] https://git.io/fju3J
<_whitenotifier-3> [m-labs/nmigen] whitequark 39ca0e6 - compat.fhdl.module: CompatModule should be elaboratable.
<_whitenotifier-3> [nmigen] whitequark closed issue #83: Compat Modules cannot be elaborated - https://git.io/fjuqC
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541185143?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.77% (+<.01%) compared to 4310254 - https://codecov.io/gh/m-labs/nmigen/commit/39ca0e6fa6807e4c8b50d837ab5869c84ffb4da8
<_whitenotifier-3> [nmigen] Success. 100% of diff hit (target 80.76%) - https://codecov.io/gh/m-labs/nmigen/commit/39ca0e6fa6807e4c8b50d837ab5869c84ffb4da8
<cr1901_modern1> whitequark: From a command prompt/cmd.exe: http://ix.io/1KTY
<whitequark> cr1901_modern1: oh
<whitequark> you're on windows
<whitequark> set NMIGEN_nextpnr_opts=
<whitequark> ^ you need that then
<whitequark> no quotes
<cr1901_modern1> When I use no quotes, the variable substitution stops working: http://ix.io/1KU0... is it possible empty but set isn't handled?
<cr1901_modern1> "empty but set"
<whitequark> cr1901_modern1: ugh
<whitequark> for now just use --placer sa as options
<cr1901_modern1> yup, sure
<cr1901_modern1> http://ix.io/1KU1 The fuck? (Permission denied?! Bitstream was generated tho!)
<cr1901_modern1> Screw it, I'll attach it to a Linux machine...
<whitequark> cr1901_modern1: no, that's important
<whitequark> i know why that happens and we need to fix it
<cr1901_modern1> Ahhh, b/c I don't know why it happens
<whitequark> regarding "Empty but set"
<whitequark> it's not a thing
<whitequark> you can't use cmd to make an empty variable
<whitequark> i think it's only possible in powershell
<cr1901_modern1> interesting... TIL
<whitequark> cr1901_modern1: can you try this patch? https://paste.debian.net/1086000/
<whitequark> this should make set NMIGEN_nextpnr_opts="" work
<cr1901_modern1> Yup, works
<whitequark> okay, let me look into the permission denied issue
<whitequark> cr1901_modern1: try this https://paste.debian.net/1086003/
<cr1901_modern1> Perfect
<cr1901_modern1> works great... all 5 LEDs are blinking at the same time
<whitequark> excellent, that's icestick, right?
<cr1901_modern1> yes
<whitequark> ok, please do tinyfpga next
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 3 commits to master [+0/-0/±3] https://git.io/fju3V
<_whitenotifier-3> [m-labs/nmigen] whitequark 1d3e9c8 - build.plat: allow (easily) overriding with an empty string on Windows.
<_whitenotifier-3> [m-labs/nmigen] whitequark 63c4123 - build.plat: hide executed commands in quiet builds on Windows.
<_whitenotifier-3> [m-labs/nmigen] whitequark 3adce21 - build.run: fix product extraction to work on Windows.
<TD-Linux> fyi iceprog works with icebreaker too
<cr1901_modern1> whitequark: Works fine on tinyfpga
<whitequark> cr1901_modern1: thanks!
<cr1901_modern1> Yea, adding icebreaker is in my plans if someone doesn't do it already
<_whitenotifier-3> [nmigen-boards] whitequark closed issue #1: `python -m nmigen_boards.<board>` should build and program blinky - https://git.io/fjuY3
<_whitenotifier-3> [nmigen-boards] whitequark commented on issue #1: `python -m nmigen_boards.<board>` should build and program blinky - https://git.io/fju3o
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541196542?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Failure. 80.75% (-0.02%) compared to 39ca0e6 - https://codecov.io/gh/m-labs/nmigen/commit/3adce21ce3bb3f47140805b2a3d79fd3a79da058
<_whitenotifier-3> [nmigen] Failure. 0% of diff hit (target 80.77%) - https://codecov.io/gh/m-labs/nmigen/commit/3adce21ce3bb3f47140805b2a3d79fd3a79da058
<whitequark> TD-Linux: yeah, but iceprog is still not very generic
<TD-Linux> yeah it is basically ft2232prog
<whitequark> for a specific pinout, right?
<TD-Linux> ya
<TD-Linux> I'll probably add a ffp target at some point
<whitequark> ffp?
<whitequark> ah
<TD-Linux> nmigen.hdl.cd.DomainError: Signal (clk sync) refers to nonexistent domain 'sync'
<whitequark> yes, you need to create the domain
<TD-Linux> is this equivalent to the default_clk thing in old migen
<whitequark> there's no equivalent to default_clk thing
<TD-Linux> hmm compat Module doesn't have .domains. I'll have to add it to the compat layer somehow
<whitequark> it does
<whitequark> it's called .clock_domains
<whitequark> note that if you've ever used the domain "sys" explicitly you need to use "sync" instead
<TD-Linux> alright with some more hackery I've got it all the way to a jinja2 error
<whitequark> jinja2 error?
<_whitenotifier-3> [nmigen] tdaede opened pull request #84: compat.fhdl.specials: fix TSTriple conversion. - https://git.io/fjusX
<_whitenotifier-3> [nmigen] whitequark commented on pull request #84: compat.fhdl.specials: fix TSTriple conversion. - https://git.io/fjus1
<whitequark> hm. what
<whitequark> MCVE
<TD-Linux> alright
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541211279?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] codecov[bot] commented on pull request #84: compat.fhdl.specials: fix TSTriple conversion. - https://git.io/fjus9
<TD-Linux> actually looking at how the SB_IO generation is implemented it's my fault nvm
<whitequark> are you bringing up an existing design or developing a new design using the compat modules?
<_whitenotifier-3> [nmigen] tdaede commented on pull request #84: compat.fhdl.specials: fix TSTriple conversion. - https://git.io/fjusN
<TD-Linux> whitequark, it's an existing design
<whitequark> ok, i found a bug
<TD-Linux> I mean it's small so I really can just convert the whole thing.
<whitequark> no, keep going then
<whitequark> i am quite interested in feedback here
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fjush
<_whitenotifier-3> [m-labs/nmigen] whitequark 0cbb743 - compat.fhdl.module: implement some TODO'd deprecation warnings.
<whitequark> TD-Linux: ^ is this commit sufficient?
<_whitenotifier-3> [m-labs/nmigen] whitequark 79a3710 - compat.fhdl.specials: fix platform lowering.
<whitequark> er, the next one
<TD-Linux> not quite
<TD-Linux> TypeError: get_tristate() missing 1 required positional argument: 'extras'
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<whitequark> huh?
<whitequark> where?
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541214219?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.75% remains the same compared to 3adce21 - https://codecov.io/gh/m-labs/nmigen/commit/79a371025542ffb72699ddc6f21445d8b18429eb
<_whitenotifier-3> [nmigen] Failure. 0% of diff hit (target 80.75%) - https://codecov.io/gh/m-labs/nmigen/commit/79a371025542ffb72699ddc6f21445d8b18429eb
<whitequark> TD-Linux: nmigen never calls get_tristate itself in the compat layer
<TD-Linux> whitequark, it calls it on specials.py:43
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<whitequark> nope?
<whitequark> you're using outdated nmigen checkout
<TD-Linux> oh whoops I git pulled too fast
<TD-Linux> that's fixed but
<_whitenotifier-3> [nmigen] whitequark commented on pull request #84: compat.fhdl.specials: fix TSTriple conversion. - https://git.io/fjuGJ
<_whitenotifier-3> [nmigen] whitequark closed pull request #84: compat.fhdl.specials: fix TSTriple conversion. - https://git.io/fjusX
<TD-Linux> AttributeError: 'TSTriple' object has no attribute 'xdr'
<whitequark> where does that come from?
<whitequark> if you post an exception without a backtrace i have no possible way to fix it. don't do that
<whitequark> thanks
<whitequark> ok, i see now
<zignig> python -m nmigen_boards.tinyfpga_bx -> blinky , confirmed here.
<whitequark> TD-Linux: try this patch: https://paste.debian.net/1086010/
<whitequark> TD-Linux: also, note that you will need to pass `dir="-"` to all platform.request calls
<whitequark> or you won't get a raw signal
<TD-Linux> whitequark, line 25 of that patch still references self.triple. is it supposed to be just self?
<whitequark> oh
<TD-Linux> that patch works (with typos fixed https://paste.debian.net/1086013/)
<_whitenotifier-3> [nmigen] tdaede opened issue #85: Compat submodules always give "Elaboratable created but never used" traceback - https://git.io/fjuGH
<TD-Linux> thank you for bearing with me on this btw
<whitequark> TD-Linux: try this: https://paste.debian.net/1086016/
<TD-Linux> whitequark, that fixes it
<TD-Linux> whitequark, actually it was even working without the elaboratable silence patch. I didn't even realize yosys and nextpnr ran because of the -q flags
<hartytp> rjo: how did you gather the data for https://github.com/quartiq/stabilizer/issues/9?
<TD-Linux> <3 nextpnr's heap placer
<whitequark> TD-Linux: yes, it is not an error
<hartytp> did you use the current fw with the systick interval decreased and then listen on 1234?
<whitequark> it is a warning
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fjuZv
<_whitenotifier-3> [m-labs/nmigen] whitequark 38917e4 - compat.fhdl.specials: fix platform lowering for TSTriple again.
<_whitenotifier-3> [m-labs/nmigen] whitequark 537d918 - compat.fhdl.module: silence "unused elaboratable" warnings.
<TD-Linux> cool, that's the end of the bugs. I have a top.bin
<whitequark> that doesn't necessarily mean it runs though
<_whitenotifier-3> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fjuZT
<_whitenotifier-3> [m-labs/nmigen] whitequark 4379a5d - hdl.ir: rephrase elaboratable warning to not look like an error.
<TD-Linux> yeah I'm putting it on hardware right now
<TD-Linux> I suppose if I was really serious I would make it output verilog and then formally verify that against the migen version
<_whitenotifier-3> [nmigen] whitequark commented on issue #85: Compat submodules always give "Elaboratable created but never used" traceback - https://git.io/fjuZO
<_whitenotifier-3> [nmigen] whitequark closed issue #85: Compat submodules always give "Elaboratable created but never used" traceback - https://git.io/fjuGH
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541233350?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. Absolute coverage decreased by -0.04% but relative coverage increased by +19.24% compared to 79a3710 - https://codecov.io/gh/m-labs/nmigen/commit/537d91851dc88af99801e30b9c150be83db7d9e5
<_whitenotifier-3> [nmigen] Success. 100% of diff hit (target 80.75%) - https://codecov.io/gh/m-labs/nmigen/commit/537d91851dc88af99801e30b9c150be83db7d9e5
<_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/541234106?utm_source=github_status&utm_medium=notification
<_whitenotifier-3> [nmigen] Success. 80.71% remains the same compared to 537d918 - https://codecov.io/gh/m-labs/nmigen/commit/4379a5d6fe8c47a81c56b55deea9ebf4771192e3
<_whitenotifier-3> [nmigen] Failure. 0% of diff hit (target 80.71%) - https://codecov.io/gh/m-labs/nmigen/commit/4379a5d6fe8c47a81c56b55deea9ebf4771192e3
<TD-Linux> indeed it doesn't work. but that might be a mistake in my new platform file
<whitequark> how are you requesting platform resources?
<TD-Linux> I matched it close to the old migen by directly having most pins be a Resource directly (without subsignal)
<TD-Linux> and then assigments like
<TD-Linux> m.comb += m._lds.eq(plat.request("lds").i)
<whitequark> hrm
<whitequark> okay, that should work in theory
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<TD-Linux> (I tried without the .i, a la migen, and it didn't work either)
<whitequark> yes, that shouldn't work without .i
<TD-Linux> it compiles though (unfortunately)
<whitequark> why aren't you using dir="-" as I told you?
<TD-Linux> I'm using that for the bidir line
<TD-Linux> m.specials += m.data.get_tristate(plat.request("data", dir="-"))
<TD-Linux> oh unless you meant actually all
<whitequark> I did mean all but it should make no real difference
<_whitenotifier-3> [nmigen] whitequark commented on issue #78: Implement XDR buffer factories for all platforms - https://git.io/fjunv
<TD-Linux> okay I got it to work.... mostly. I had missed a dir="" in one of the Pins in the platform
<TD-Linux> it's now mostly working but corrupting some data. I'll have it generate verilog and compare to see what went awry
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<cr1901_modern1> what is dir="-"?
<whitequark> requests a raw pin
<whitequark> something you can connect to an IO primitive
<cr1901_modern1> Is this necessary for ice40 b/c of pnr limitations still?
<whitequark> this has nothing to do with an FPGA family or PNR limitations
<whitequark> rather, this is necessary each time you want to set the IO buffer parameters yourself
<cr1901_modern1> Oh, right. In the case of tristates, I thought nmigen would handle this automatically for you to set up the I/O buffer parameters correctly at the RTLIL level
<cr1901_modern1> ditto w/ diff pairs
<whitequark> yes, nmigen platform layer includes a lot of these primitives
<whitequark> but maybe you want something like DDR (the memory interface)
<whitequark> or a SERDES with strange settings
<cr1901_modern1> Makes sense now; it's an override for default behavior if you need it
<whitequark> or a DDR (the 1:2 gearbox) with different latency than the nmigen primitive
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<hartytp> whitequark: I'm playing with some embedded rust and am hitting a panic on unwrapping an error. Am I right in thinking there is no easy way to figure out where this happened in my code?
<whitequark> hartytp: you could connect gcc to it
<whitequark> and break on the panic handler
<whitequark> err, gdb
<hartytp> ok thx
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<rjo> hartytp: that's ADC0 terminated (blue), ADC1 high-Z (orange) connected to DAC1 (green) with a P=-0.1 I=10Hz PI loop
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<ambro718> Hi. I cannot figure out from the documentation, what does this do: sync += [signal.eq(signal+1), signal.eq(signal+1)] ? Is signal incremented by one or two?
<ambro718> In other words are sync assignments blocking or nonblocking?
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<hartytp_> rjo: to check I understand you, the blue line is
<hartytp_> - ADC0 terminated, but not connected to any source
<hartytp_> - sampling at ~400kHz (200kHz nyquist)
<hartytp_> - reading ADC values from Stabilizer via ethernet
<hartytp_> -rms noise is order 10^(-50/20)*sqrt(250e3)=1.5LSB RMS
<hartytp_> is that correct?
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<rjo> 500 kHz, 1.8 LSB rms
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<hartytp_> rjo: nice!
<hartytp_> rjo: how were you getting the samples out of Stabilizer at 500kSPS?
<rjo> just ethernet.
<hartytp_> using which fw?
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<rjo> just my stabilizer firmware hacked to buffer and dump everything
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<hartytp_> rjoL good. I was planning to do something similar. do you still have the code you used for that?
<hartytp_> rjo: ^
<spyder> hi all, I am wondering if there is a more elegant way for doing this: https://gist.github.com/kpelckmans/98cf0387f305bac0c017dde9dc67a1ac
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<cr1901_modern> whitequark: Random data point... nmigen-boards blinky works fine on icestick on my aarch64 pinebook
<cr1901_modern> Pretty cool to have a non-x86, non-verilog HDL flow working
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