<xiangfu> lekernel: all the code is ready for RC3 right?
<xiangfu> if the code is ok, I will trigger one build for Adam. (for RC3 boards)
<xiangfu> ok. it already there. :)
<kristianpaul> he, sozi is nice
<kristianpaul> thanks rejon !
<aw> xiangfu, so i still should to use http://milkymist.org/wiki/index.php?title=Flashing_the_Milkymist_One#Flash_BIOS_with_mac_address to reflash each board, right?
<xiangfu> yes
<xiangfu> Hi from the http://www.milkymist.org/updates/2011-07-13/, it not reflash the data partition.
<xiangfu> I would advice flash all patchpool and wallpaper to data partition.
<xiangfu> no needs let user download patches manually
<kristianpaul> aw: hi, already passed SMT?
<kristianpaul> s/passed/done
<aw> kristianpaul, hi, not yet finished SMT process.
<aw> kristianpaul, supposedly be held on tomorrow, but still seems that they are still busy though. :-) Usually they notice me before one day. he. :-)
<kristianpaul> :-)
<lekernel> xiangfu, in updates/ it's for the auto web update and it does take care of the patch pool
<xiangfu> yes. I mean when Adam reflash the RC3 board, we can just flash all patches to the boards. no needs let user webudpate again :)
<lekernel> have you got my email?
<lekernel> yes for the run 3 boards you flash the data partition of course
<lekernel> you'll also need to modify my rescue BIOS image to take into account the different mac addresses
<lekernel> well, everything should be explained in the email I sent yesterday
<xiangfu> no. not check mail today. will read that later.
<xiangfu> ok. thanks.
<lekernel> xiangfu, you need to update the BIOS CRC after you modify the MAC address
<xiangfu`> (CRC) lekernel_ oh, yes.
<GitHub39> [extras-m1] yizhangsh pushed 2 new commits to master: http://bit.ly/q1oOsz
<GitHub39> [extras-m1/master] add new box artwork design - Yi Zhang
<GitHub39> [extras-m1/master] modifed Save as PDF Color - Output indended to Printer - Yi Zhang
<GitHub81> [extras-m1] yizhangsh pushed 1 new commit to master: http://bit.ly/ptrm79
<GitHub81> [extras-m1/master] modifed Save as PDF Fonts to outline all fonts - Yi Zhang
<GitHub67> [extras-m1] yizhangsh pushed 1 new commit to master: http://bit.ly/n0tksJ
<GitHub67> [extras-m1/master] rearranged objects positions - Yi Zhang
<GitHub4> [milkymist] sbourdeauducq pushed 1 new commit to master: http://bit.ly/oK7PGz
<GitHub4> [milkymist/master] FML: early ack - Sebastien Bourdeauducq
<lekernel> ok i have some experimental rendering in 1027x768
<lekernel> 1024
<mwalle> hi
<mwalle> cool ;)
<lekernel> the problem is, I need to increase the soc frequency to 90MHz which isn't possible when CPU debugging is enabled (it wouldn't meet timing and the critical path goes through the debug unit)
<mwalle> breakpoints unit?
<lekernel> watchpoints
<mwalle> so what do you think about building only the failsafe image with break/watchpoints
<lekernel> mh... one of the nice things about the hw debugger is you can run it after an unexpected crash
<mwalle> yeah but did you ever used watchpoints?
<mwalle> (after a crash)
<mwalle> btw is the spartan6 really that slow compared to the cyclone3? or are only the tools shitty?
<lekernel> good question, I don't really know
<lekernel> it'd be interesting to try with synplify, so at least the netlist would be good
<lekernel> but I don't have access to any version that supports the s6
<lekernel> well.. maybe i'll use altera on my next board ;-)
<lekernel> especially since they published a lot of stuff with QUIP with is a lot easier to understand than xdl/speedprint/fpgaeditor
<mwalle> lekernel: enabling debug without watchpoints/hw breakpoints should still give you enough possibilities for debugging
<wpwrak> how much faster would it get with altera ?
<lekernel> difficult question
<mwalle> wpwrak: accoring to terpstra 125mhz with cyclone 3 and 175 with aria2 (dunno the lm32 config)
<lekernel> he, some patches look very nice in 1024
<lekernel> I cranked up the mesh size too (this we can do without difficulty, we have more than enough FPU power atm)
<lekernel> the fps drops though ...
<lekernel> % stats
<lekernel> Uptime: 00:05:07  FPS: 10  CPU: 32%
<lekernel> Net memory bandwidth : 1754 Mbps
<lekernel> Memory bus occupancy : 44%
<lekernel> Avg. mem. access time: 4.20 cycles
<lekernel> i'd guess this could be solved with pixel prefetching in the TMU
<wpwrak> mwalle: and with xilinx it's < 90 MHz ... so up to twice as fast. nice ! seems that the altera chips are also a bit more expensive than their xilinx counterparts, though (?) (e.g., XC6SLX45-2FGG484CES vs. EP3C40F484C8N, at digi-key USD 54 vs. 87)
<mwalle> wpwrak: well <90mhz vs 125mhz, dunno what a virtex can achieve
<lekernel> is the slx45 comparable to the 3c40, in terms of area?
<lekernel> also the aria2 are very expensive
<wpwrak> according to digi-key, EP3C40F484 has 39600 logic elements/cells (vs. 43661), 2475 LABs/CLBs (vs. 3411), and ~1 Mb RAM (vs. ~2 Mb), 484 BGA
<wpwrak> if you need more RAM (and also some more logic), the next stop would be EP3C55, at USD 141+
<wpwrak> too bad there's no nice way to "export" a digi-key query