Lofty changed the topic of #prjmistral to: Project Mistral: Yosys (and hopefully nextpnr) on Cyclone FPGAs - https://github.com/ZirconiumX/mistral - logs: https://freenode.irclog.whitequark.org/prjmistral
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<Sarayan> fuck modern fpgas are complicated
<Sarayan> one friggin pll is 280 i/o lines
<Sarayan> even more than that, I had missed a bunch
<daveshah> Wait till you start looking at transceivers...
<Sarayan> iobs are probably next, going to be oh so much fun
<Sarayan> The "fun" thing (fun may vary) is to mapping those 614 (yeah, that's the real number) lines to what they actually are for
<Sarayan> s/ to/
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