Lofty changed the topic of #prjmistral to: Project Mistral: Yosys (and hopefully nextpnr) on Cyclone FPGAs - https://github.com/ZirconiumX/mistral - logs: https://freenode.irclog.whitequark.org/prjmistral
<chipb> huh. I just realized the public .bsdl files notate unused pads in the boundary scan register per device variant. I don't know if that's helpful to you, but just throwing it out there.
<chipb> actually, now that I think about it that'd obviously be needed for third parties to actually integrate their boundary scan tooling with those. duh.
<chipb> I'm not sure I've seen mention of using the files in reference to decoding package<->die relations here.
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