15:22 <Lofty> ping Sarayan

15:22 <Lofty> Happy to report the bottle of cider I had yesterday has very much worn off

15:28 <Sarayan> :-)

15:28 <Sarayan> How's your head?

15:36 <Lofty> Much clearer today, thanky ou

15:37 <Sarayan> huhuhu

15:37 <Lofty> Okay, so

15:37 <Sarayan> As long as you avoided a hangover, it's good

15:40 <Lofty> I guess the best starting point here is probably getBelPins

15:41 <Sarayan> okay?

15:46 <Lofty> So, a nextpnr-cyclonev Bel has flops and LUTs. It looks like the libmistral pnode is...an ALM?

15:47 <Sarayan> hmmm no

15:47 <Sarayan> in fact there's no type for an alm

15:48 <Sarayan> perhaps we should add it, dunno

15:48 <Sarayan> but an alm is a pair (block_type_t, pos_t)

15:49 <Sarayan> a pnode_t is one pin of an alm

15:49 <Sarayan> a rnode_t is one node in the routing grid

15:51 <Sarayan> some pnode_t are not connected to anything, but most pnode_t are connected to one specific rnode_t

15:52 <Lofty> What about the intra-ALM connections? Am I going to have to somehow model those myself?

15:52 <Sarayan> and most (all? not sure yet) input pnode_t of peripheral alms have an optional inverter

15:52 <Sarayan> yes, you're going to have to

15:53 <Lofty> daveshah: any advice on how best to do that?

15:53 <Sarayan> there are multiple strategies possible, and I have to idea what is the best one, which is why I decided that the lib will just describe what's there

15:54 <Lofty> Mhm

15:55 <Sarayan> I mean, you take the LAB graphs, what should be routing and what shouldn't in there, I really have no clue

15:56 <Sarayan> fwiw, quartus has everything in the routing tables for the peripheral alms, and almost nothing for the internal ones. Go figure

15:57 <Lofty> I've been writing so much Rust that I forgot C++ switch/case falls through

15:57 <daveshah> Yeah you'll need to add wires and pips for the intra ALM connections

15:57 <daveshah> I'm afk right now with limited phone signal so answers may be limited for the next 30 mins

15:58 <Lofty> Hmmm

15:59 <Sarayan> rnode_type_t is 0-24, while there's space for 8 bits in rnode_t, so you can feel very free to add your own types

15:59 <Lofty> As long as libmistral never sees them, right? :P

16:00 <daveshah> Yeah adding some kind of flag to wire/pip ids that way so you know which ones are intra alm makes sense

16:00 <Sarayan> the only things that will care is rn2s() because the string for the type name will be out-of-bounds

16:01 <Sarayan> plus of course they will not exist in the grid, but that's expected

16:08 <Lofty> https://puu.sh/HeekJ/ddaea26656.png <-- so, here's the Quartus ALM diagram

16:10 <Sarayan> It has issues, use mine

16:11 <Sarayan> https://og.kervella.org/docs-html/#lab

16:12 <Lofty> I kinda feel like laying all that out >.>

16:12 <Sarayan> what do you mean?

16:13 <Lofty> Well, I guess you'll see

16:13 <Sarayan> :-)

16:14 <Sarayan> There's an unspoken code, green is an internal connection, black is external, on the left of the connection point in input, on the right is output

16:14 <Lofty> What do the triangles with a number in mean?

16:15 <Lofty> Near like bpkreg0 and bsload_en

16:16 <Sarayan> force-to-0 or force-to-1 when the bit is set

16:16 <Sarayan> what is forced to being the number

16:16 <Lofty> Ah, okay.

17:42 <Lofty> Sarayan: https://puu.sh/HefoP/b85c48274d.png <-- gonna take a break from this now, but

18:23 <Sarayan> ahhh, you're redrawing it on a real schematics program instead of inkscape?

18:25 <Sarayan> sounds like a good idea

18:56 <Lofty> Sarayan: KiCad :P