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<Xark>
Hello. I thought I would play with SymbiFlow, but following the "Getting Started" doc on Ubuntu 18.04, it fails for me on first "make" with "/xsltproc: error while loading shared libraries: libiconv.so.2: cannot open shared object file: No such file or directory". Is this a known issue (libiconv is apparently included as part of libc6 on Ubuntu)?
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<sf-slack3>
<kgugala> hi Xarc
<sf-slack3>
<kgugala> Xarc: try running make all_conda first
<sf-slack3>
<kgugala> and then the rest
<sf-slack3>
<kgugala> conda should get the missing lib
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<Xark>
sf-slack3: Thanks! Okay, I will try that later. Appreciate the help. :)
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<hackerfoo>
A simple design with DRAM, PCIe, and GPIO connected through AXI takes ~20% of an xc7a200t with Vivado. That's more than I expected.
<daveshah>
> LiteX produces a design that uses about 20% of an XC7A50 FPGA with a runtime of about 10 minutes, whereas Vivado produces a design that consumes 85% of the same FPGA with a runtime of about 30-45 minutes.
<hackerfoo>
Still, 10% of a 200T is a lot for VtR to handle when we're currently only working with 1/5th of a 35T.
<litghost>
Plan is to use all of the 35T for LiteX
<hackerfoo>
daveshah: Reading that article, skipping DRAM calibration seems iffy. Seems like companies providing IP can't cut corners like that.
<hackerfoo>
Maybe you could do it with partial reconfiguration.
<daveshah>
LiteX doesn't skip calibration
<hackerfoo>
I'm just reading the article, not referring to LiteX.
<daveshah>
Ah right
<hackerfoo>
I guess I should try making a LiteX version of Project-0.
<hackerfoo>
litghost: Is there a LiteX design yet?