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<mithro> mkurc: You about?
<sf-slack> <mkurc> @mithro Yep
<mithro> mkurc: Did you want to have a quick sync up on v2x related stuff?
<sf-slack> <mkurc> @mithro Sure
<mithro> @mkurc: Shall I do a VC?
<sf-slack> <mkurc> @mithro: Ok, we can have a VC
<mithro> mkurc: You should have a meeting invite
<sf-slack> <mkurc> @mithro: Yes, I've got it.
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<tpb> Title: Manually set inputs as clock SymbiFlow Verilog to XML (V2X) 0.0-514-ge4b87e3 documentation (at python-symbiflow-v2x--74.org.readthedocs.build)
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<tpb> Title: GitHub - SymbiFlow/XilinxUnisimLibrary: Apache 2.0 licensed copy of the Xilinx Unisim library. (at github.com)
<tpb> Title: XDC commands supported by SymbiFlow Yosys Plugins - Google Sheets (at docs.google.com)
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<tpb> Title: read_place: do not throw error if block name is invalid by acomodi · Pull Request #1541 · verilog-to-routing/vtr-verilog-to-routing · GitHub (at github.com)
<tpb> Title: Snippet | IRCCloud (at www.irccloud.com)
<mithro> opps wrong channel
<sf-slack> <acomodi> @mithro: some of the tests in symbiflow (carry-stress) are autogenerated (both design, and constraints file) based on tests parameters defined in CMake, and all the tests are generated for each board/device.
<sf-slack> <acomodi> mithro: After synthesys, some of the tests for ice40 do not have all the IO signals connected, therefore VPR produces a packed netlist without the unconnected IO signals.
<mithro> @acomodi: Can you be more specific about what is unconnrected?
<sf-slack> <acomodi> mithro: https://pastebin.pl/view/6a94be86
<tpb> Title: Untitled - Pastebin (at pastebin.pl)
<sf-slack> <acomodi> In the paste there, there is the design, the output eblif and the PCF. The carry_fabric signal is the unconnected signal in this case, which is present in the PCF
<sf-slack> <acomodi> I believe that another solution would be to add a fix to the IO placement script that generates the placement constraints for VPR, so that it avoids outputting the constraint itself, if the related signal is unconnected. I need to check if this is easily doable
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