08:52 <ArturSwiderski> My request from yesterday to join the mailing list is still pending, so I didn't get any task for the time being, so I am leaving my email address here. If any of you can point me to tasks which I could possibly do it would be appreciated. I am interested in entry level tasks (c++ or verilog ). My email : arturswiderski82@gmail.com

09:04 <sf-slack> <pgielda> @ArturSwiderski there is not really a lot of movement on the mailing list... most of the communication happens here on irc and more importantly on github where the work happens. Personally, I would recommend starting with just trying to *use* (precompiled) Symbiflow toolchain (following the guidelines from https://github.com/symbiflow/symbiflow-examples) then figure out a part of the toolchain software stack (its

09:04 <sf-slack> really a lot of smaller projects) where you think you can contribute and then try to improve something small. Also we are always happy to see improvements (PRs) to documentation. There is never enough documentation ;)

09:04 <tpb> Title: GitHub - SymbiFlow/symbiflow-examples: Examples designs for showing different ways to use SymbiFlow toolchains. (at github.com)

09:06 <sf-slack> <pgielda> There are also adjacent projects that you can try to contribute to (e.g. LiteX, a migen-based SoC generator that support Symbiflow - and many other toolchains). https://github.com/litex-hub https://github.com/enjoy-digital/litex

09:06 <tpb> Title: LiteX-Hub · GitHub (at github.com)

09:09 <sf-slack> <pgielda> Important part of the flow is Verilog to Routing -- https://github.com/verilog-to-routing/vtr-verilog-to-routing . This project is heavily developed by both contributors from Symbiflow and researchers and students of University of Toronto

09:09 <tpb> Title: GitHub - verilog-to-routing/vtr-verilog-to-routing: Verilog to Routing -- Open Source CAD Flow for FPGA Research (at github.com)

09:10 <sf-slack> <pgielda> There is a number of papers published about VtR, I would suggest digging through those if you are interested in contributing there.

10:03 <ArturSwiderski> Ok I will try to get familiar with tool, before I was using Intel/Altera vendor specific stuff

11:00 <Lofty> Well, Intel stuff actually falls under Project Mistral, which I am (de facto) project lead for

11:00 <Lofty> I have a few tasks that might be doable for others

11:06 <Lofty> A rewrite of the infrastructure for Cyclone IV would probably be enough motivation to replace synth_intel

12:50 <sf-slack> <olof.kindgren> Ohh... Mistral - Cyclone, I get it! Wasn't the Intel documentation project called someting else, or do I remember that wrong?

12:52 <Lofty> Chibi was the Max V documentation project

12:53 <Lofty> Mistral is the Cyclone V documentation project

12:53 <sf-slack> <olof.kindgren> Chibi..?

12:53 <sf-slack> <olof.kindgren> Ah. I see

12:54 <Lofty> (a style of Japanese cartoon emphasising being small and cutesy)

12:59 <sf-slack> <olof.kindgren> Thought it sounded familiar. I used to watch a lot of anime when I was younger

13:00 <sf-slack> <mgielda> for me chibi only sounds familiar because of chibios

13:44 <sf-slack> <pgielda> http://chibios.sourceforge.net/docs3/rt/index.html

13:44 <tpb> Title: ChibiOS/RT: Introduction (at chibios.sourceforge.net)

13:44 <sf-slack> <pgielda> "Chibi ? I didn't want a serious name for this project. It is the Japanese word for small as in small child. So ChibiOS/RT means small Real Time Operating System. "

13:44 <sf-slack> <pgielda> ;)

14:10 <sf-slack> <olof.kindgren> I was working as system architect at a large Japanese company a couple of years ago and named all parts of the system different things from Gundam in the hope that I would get some recognition. No one noticed a shit. So disappointed

14:13 <sf-slack> <olof.kindgren> Like the sensors were called Newtype X, Z and ZZ and he control application was called psycommu

14:49 <sf-slack> <mgielda> what can you do. some people just do not understand

20:48 <sf-slack> <olof.kindgren> I think I'm having issues inferring 32-bit wide memories with byte enable. Is this a known issue?

20:50 <sf-slack> <olof.kindgren> For the quicklogic backend I mean

21:01 <sf-slack> <olof.kindgren> Hmm..might be my 2-bit memory that isn't inferred correctly actually. Too tired to look more at it now

22:15 <Lofty> I don't think the QuickLogic backend infers memories at all