06:16 <sf-slack> <tpagarani> @olof.kindgren the bootloader by default configures the PAD_6 to be GPIO controlled by ARM for allowing user to get into download mode. To configure it as FPGA controlled IO for your application, you need to change make ucFunc = PAD6_FUNC_SEL_FBIO_6

06:28 <sf-slack> <tpagarani> @olof.kindgren, @kgugala. Based on this thread of discussion, looks like for a pure FPGA user to avoid use of SWD Cables or compiling ARM APP every time with new bitstream header file, it would make sense to have an app on ARM side that would load FPGA bitstream from flash (similar to bootloader) and allow bitstream to be updated using TinyFPGA Progammer. This APP would by default configure all IOs to be controlled

06:29 <sf-slack> by FPGA and configure the FPGA clocks to be programmed based on input from TinyFPGA Programmer Script.

06:37 <sf-slack> <kgugala> @tpagarani indeed this would be helpful for all those users who don't have (or don't want to) connect the SWD programmer

06:45 <sf-slack> <olof.kindgren> @tpagarani Cool. I'll try to change ucfunc and report back

06:49 <sf-slack> <olof.kindgren> I think there are two things that could potentially be done, but I'm not sure how feasible they are. First thing would be to set pad properties from the pin constraint file (where pin missing == controlled from ARM). That's the way I normally set slew rate, drive strengths etc. This would of course require a) support for these properties in the pcf syntax and b) a way for the chip to actually apply these settings

06:49 <sf-slack> from a bit file. I guess this could be done by an expanded load_fpga function but I haven't looked at the details yet

06:50 <sf-slack> <olof.kindgren> But as you say, a special FPGA only bootloader would help my use case as well

06:51 <sf-slack> <olof.kindgren> And if the logistics work, perhaps sell a quickfeather+swd cable combo

11:19 <sf-slack> <olof.kindgren> @tpagarani Yes! Changing ucFunc did the trick. My RTL reacts to usr_button now

11:30 <sf-slack> <tpagarani> @olof.kindgren That's great! Thanks for the feedback on earlier points. Will come back with solutions on those

17:43 <_whitenotifier-f> [prjxray] litghost opened issue #1465: Read the docs build failing on prjxray? - https://git.io/JT4N5

21:46 <mithro> "Verilog and SDC mapping" -- https://docs.google.com/spreadsheets/d/1G-E2Dq8YG4g9Z6mTygpumwlI_vNlFUQinc9gMgePfec/edit#gid=1349094793

21:46 <tpb> Title: XDC commands supported by SymbiFlow Yosys Plugins - Google Sheets (at docs.google.com)