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<philtor>
ZipCPU: The thread seemed to die with the debbie downer there at the end.
<ZipCPU>
Yeah, I saw that. Did you see the link to the Digilent thread?
<philtor>
no
<ZipCPU>
Check the post mentioning Olof's quote.
<philtor>
"Companies cannot usually afford the man hours to use something like this." I spent a huge number of man hours trying to work around vivado bugs.
<ZipCPU>
I think it was a small second quote I made. There's a link in it to a fascinating Digilent thread, discussing why open source tool chains are *really* valuable.
<philtor>
Bugs that Xilinx wasn't even interested in hearing about from us
<awygle>
ZipCPU: thanks for the link. Tricky sums up (at least a part of) my feelings well
<ZipCPU>
Yeah. Understood. There didn't seem to be much more to say after he posted, so ... the conversation died there.
<awygle>
my understanding is that UVM is open source
<awygle>
but that the current state of the rest of the open source ecosystem doesn't support its use
<awygle>
does that match your understanding?
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<ZipCPU>
Not sure I could say much about UVM, never tried it, never used it, still struggling to figure out how it comes to play in this whole ecosystem.
* awygle
is all fired up but has to do his actual job
<ZipCPU>
awygle: Feel free to support me on Patreon, then you won't feel as guilty! :P
<awygle>
ZipCPU: has your patreon made a meaningful impact on the amount of open source work you're able to do?
<ZipCPU>
Not sure how I'd answer that.
<ZipCPU>
I mean ... even with all the numbers, finances, figures, etc., ... I'm not sure how I would go about answering it.
<ZipCPU>
I will say this, almost *all* of my work in the past couple years is on github.
<awygle>
all right, let me rephrase: i want to do more open source work, should i start a patreon? :p
<ZipCPU>
Ahh, okay, that's an easier question to address.
<awygle>
i suspect your advice will be "start a blog"
<ZipCPU>
I've had the patreon account now for 3/4 of a year now, and ... it doesn't pay the needs of my family. Specifically, it's not coming close to paying for my son's college tuition.
<ZipCPU>
Patreon is one of those things where you have to build a following, and ... it can be slow doing that.
<ZipCPU>
There are folks who are making $40k+/year on Patreon. That would cover a lot (not all) of my expenses, but I'm a long way from getting there.
<awygle>
this is more or less my impression as well. donations as a business model are very challenging
<ZipCPU>
Although, I might have a suggestion for you if you are interested in that road ...
<ZipCPU>
"Inbound Marketing: Get found using Google, Social media, and blogs", by Brian Halligan and Dharmesh Shah --- a wonderful book about today's marketing challenges and solutions.
<awygle>
thanks for the suggestion! i'll add it to my list
<awygle>
i've fallen very behind on books recently but i hope to have time to improve the situation soon
<ZipCPU>
I found it at a used bookstore. I'm not intending on selling my copy, not sure why whoever sold it to the used book store did--the things' been gold to me.
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<xerpi>
hi, it seems like modules are searched on <modname>.v but I'm using systemverilog so my extensions are .sv
<xerpi>
top.sv instantiates from a module called fulladder.sv
<xerpi>
I've copied fulladder.sv to fulladder.v but it doesn't find it (no fulladder block in the diagram)
<xerpi>
if I run: yosys -q -o top.json -p proc -p opt -p "hierarchy -auto-top" $(TOP) fulladder.sv
<xerpi>
it works
<xerpi>
so I have to add all my .sv's to the cmd line
<xerpi>
awygle, I'd write that pull request if that prevent me from having to add the list of all my .sv's xDD
<xerpi>
I don't have to pass my list of .sv's (only top module) to verilator and I'd like to be able to do the same with yosys :P
<xerpi>
I guess I'll use *.sv for now heh
<ZipCPU>
Be aware ... with *.sv (or *.v for that matter) you may need to identify to hierarchy which module is the "top" module
<xerpi>
ZipCPU, yeah for now my project is very small, but I can set the top module using the hierarchy command
<ZipCPU>
k
<awygle>
i've been explicitly read_verilog-ing all of my files every time >_>
<xerpi>
I still was expecting copying my .sv to .v to work hm
* ZipCPU
has done the same as awygle, even teaching AutoFPGA how to compose that list of files
<awygle>
i think the autodetect only works if the module name is the same as the .v file name, so you might have to read_verilog the file containing top?
<xerpi>
awygle, exactly, that's what I was expecting
<xerpi>
and also what I'm doing
<awygle>
it doesn't look like it on your command line though. you're just using hierarchy -auto-top, not actually grabbing the file containing $(TOP)
<awygle>
(unless you pass it explicitly)
<xerpi>
oh ok let me try that
<awygle>
basically i'd expect it to find the fulladder module automatically, but not any others
<xerpi>
so not specifying any hierarchy should also work
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* ZipCPU
is checking whether or not the current yosys in the repo supports xerpi 's request
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<ZipCPU>
xerpi: Try a pull of yosys from github.com/YosysHQ ... see if that helps you out at all.
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<xerpi>
ZipCPU, sure, I'll try the upstream version
<xerpi>
my OS version is Yosys 0.7 (git sha1 cc49ece)
<ZipCPU>
The upstream version may have just changed ....
<xerpi>
nope still not working :/
<xerpi>
I'll add some debug printfs to see what's going on hehe
<ZipCPU>
No?
<xerpi>
no, it doesn't automatically load fulladder.v
<ZipCPU>
Try this, put together a minimal example of what's failing that can then be used as both a means of communicating what you are looking for, as well as a test case.
<xerpi>
that would be a good idea yeah
<xerpi>
btw, expand_module is only called when doing an hierarchy pass
<xerpi>
and frontend_call is called only if libdirs is not empty
<xerpi>
I guess it would be nice to always add the dir of the module that's being checked to libdirs
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<xerpi>
I've added some cout's and it's definitely looking for fulladder when running "hierarchy"
<xerpi>
the problem is that the libdirs list is empty
<xerpi>
I'll try pushing back the path of the module
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<xerpi>
yeah adding -libdir manually makes it try to load the fulladder.v
<awygle>
Looks reasonable to me, so long as "verilog - sv" is the correct front-end
<ZipCPU>
Other than the extensions_map and the reconstruction brought about with it ... how does that fix your issue in a way that the previous fix didn't?
<awygle>
I'm not a Yosys dev though so ultimately my thoughts are of limited use lol
<xerpi>
ZipCPU, now it will also looks for .sv files
<ZipCPU>
Just like the build from github should've done for you.
<xerpi>
still have to pass "-libdir ." to hierarchy but that's not a problem
<ZipCPU>
That's why I had you do a pull ... to get the change that should've fixed your issue.
<xerpi>
ZipCPU, not really, without my patch it only tries to open .v and .il files
<xerpi>
uh what
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<ZipCPU>
Then you didn't get the right files. :)
<xerpi>
urgh yeah, sorry :(
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<xerpi>
I thought my pull you meant "fix it and do a pull request"
<xerpi>
by pull*
<ZipCPU>
Nope.
<xerpi>
right, sorry then
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<xerpi>
anyways my "fix" can now be considered a cleanup lol
<xerpi>
less code duplication
<ZipCPU>
I mean ... I like your patch and all, and see how it could be valuable ... especially if yosys tries to add other files (.vhd for example) ...