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<kc8apf> agg: many of the PCILeech boards use FT601. It works decently well.
<agg> Cool, thanks!
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<awygle> azonenberg: how far did you take TRAGICLASER? Did you hook it up to "real" networking equipment at any point?
<azonenberg> It negotiated just fine with my cisco and i was sending hardcoded packets that were received fine
<azonenberg> and it correctly parsed incoming traffic
<azonenberg> the lack of adaptive thresholding on the RX would limit the usable RX range to << 100m of CAT5e, but the TX seemed to meet the full IEEE eye mask and should work just as well as a "real" PHY
<emeb> mithro: Ah no - hadn't seen that stuff. I'll take a look in the morning...
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<awygle> Did you ever document it and package it standalone as you indicated you intended to do on Twitter?
<azonenberg> it's in the antikernel repo now and should be easy enough to set up, there's a full writeup in poc||gtfo from a few years ago
<azonenberg> however it's for spartan6 and i never updated it for 7 series
<azonenberg> but that should be fairly easy to do
<awygle> Huh I thought it was artix 7 for some reason
<awygle> OK thanks for the update. I will probably not use it but if I did I'd be attempting porting it to ECP5
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<azonenberg> awygle: fundamentally you need 2x LVDS inputs at 500 Msps to build a 1.5 bit flash ADC with 4x oversampling of the signal to do clock recovery
<azonenberg> and an external 3-resistor ladder to create the reference voltages for each input
<azonenberg> then on the TX side you need four 3.3V push-pull CMOS outputs with resistors off each one
<azonenberg> set up as two paralleled H-bridges, but one with larger resistors than the other, also driving at 500 Msps
<azonenberg> the weaker drive is used for the MLT-3 output, the stronger drive is used for autonegotiation and the not-fully-implemented 10baseT mode
<azonenberg> as well as pre-emphasis on the MLT-3 to improve rise/fall times on some transitions
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<emeb> mithro: thanks for the links to the up5k / rpi interface examples. The hardware stuff is very similar to my own (aside from using different GPIO pins for the non-spi stuff) but I may study it for details on how to support programming flash memory.
<emeb> my current hardware has no flash but it might be nice to have the system configured at boot time so that the RPi audio drivers wake up happy.
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<mithro> agg: FYI -- We are working on usb3.0 using the ECP5 / Artix 7 high speed transceivers -> https://github.com/enjoy-digital/usb3_pipe and https://github.com/greatscottgadgets/luna
<agg> aah cool, i was watching luna but not usb3_pipe
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