<nats`>
IIRC it's the "real way" to reset JTAG state machine :)
<whitequark>
huh?
<nats`>
if you look at the state machine if you push 1's in TDI it always fall back in first state :)
<whitequark>
please read the snippets...
<whitequark>
oh
<whitequark>
not TDI
<whitequark>
the JTAG state machine resets after five 1's on TMS
<nats`>
TMS sorry
<nats`>
yes that one seems crap oO
<nats`>
it's a really weird way to reset I'm not even sure you can call that JTAG
<whitequark>
it doesn't reset the JTAG TAP
<whitequark>
it resets the CPU core
<nats`>
I don't understand the first part of the snippet
<nats`>
"or resetting the JTAG reset source"
<whitequark>
oh
<nats`>
maybe I'm missing some part
<whitequark>
it just means "CPU reset source that comes from JTAG"
<whitequark>
nats`: best part
<whitequark>
it doesnt actually match what the hw does
<whitequark>
the hw does the sane thing. updates in update-dr
<whitequark>
there's a different insane thing with that TAP but they at least sort of hint at it, clumsily
<nats`>
sometime you're glad the documentation is wrong :D
<nats`>
last one I found insane what the MSP430 "jatglike" interface
<nats`>
I took a look for someone
<whitequark>
spy-bi-wire?
<nats`>
I'm not sure about the name I would need to check but on this interface at some point you need to toggle the data lane to emulated clock cycle in an internal state machine
<nats`>
I inferred the last part
<whitequark>
ohh that one
<whitequark>
i implemented the other one, which is even more jank
<nats`>
my conclusion after all those years is that jtag only means they have wires name starting by T and used to program something and debug something sometime :D
<whitequark>
lol
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<cyrozap>
whitequark: Based on that documentation you posted, it looks like the the clock for the reset register is gated by whether or not the AVR_RESET instruction is in the IR.
<cyrozap>
So the short answer to your question is "no".
<awygle>
the biggest problem with the TDI thing the MSP430s do is it means you can't actually chain them
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