<electronic_eel>
anybody here who knows a bit about the Glasgow schematics?
<ali-as>
Ask your question and someone will see it.
<electronic_eel>
There are resistors networks between the fpga and the '45 level shifters
<electronic_eel>
What are they for?
<tnt>
slew limit / series termination
<electronic_eel>
My guess is to protect Glasgow from shorting itself out when buggy HDL is loaded
<electronic_eel>
termination on these short traces?
<tnt>
and yeah, probably helps with protection against contention too
<electronic_eel>
Unfortunaltely the schematics still lists TBD as value
<electronic_eel>
So no clue about the reason from that side
<ali-as>
Is this RN4?
<electronic_eel>
RN1 and RN3
<electronic_eel>
RN4 and RN5 are between the '45 and the outside ports
* ali-as
nods, I was confused about which side of the level shifters connected to the outside world.
<electronic_eel>
The reason of RN4 and 5 is clear, termination makes sense to the outside
<electronic_eel>
If the primary reason for RN1 and 3 is protection against contention, then I guess there should be a similar resistor between the fpga and the level shifter for sync
<bgamari_>
I placed 1k there
<bgamari_>
IIRC
<electronic_eel>
1K would work good for protection against contention
<tnt>
huh ... I'd put like 33 or 100ohm or so.
<bgamari_>
tnt, what do you think the capacitance of those inputs is?
<electronic_eel>
33 to 100 Ohms would work better for termination and be probably not enough for protection
<bgamari_>
right
<tnt>
bgamari_: I'd plan for 10p or so
<bgamari_>
right
<bgamari_>
which means that your 1/RC should still be around 100MHz with 1kohm
<electronic_eel>
bgamari_: do you think termination is neccessary, the traces are about 20mm long or so
<bgamari_>
I doubt it
<tnt>
bgamari_: yeah and I'd want the RC to be like 10x the max frequency I'd want to work with.
<electronic_eel>
1K might indeed be a bit much, 470 should be enough for protection
<bgamari_>
yes, that is true
<bgamari_>
470 is likely fine
<electronic_eel>
hmm, couldn't find a absolute max current value for the ice40hx in the datasheet
<tnt>
8 mA
<electronic_eel>
where did you find this?
<electronic_eel>
just want to learn to read their datasheets...
<tnt>
SysIO single-ended DC caracteristics
<tnt>
Iol and Ioh
<electronic_eel>
yes, but isn't that just the conditions when the Voh min voltage is guaranteed?
<electronic_eel>
usually the pin allows a higher current, but the voltage drops (high) / rises (low) then
<tnt>
well obviously it's not just gonna die at 8.0001 mA ...
<tnt>
but you shouldn't draw more than 8 mA during normal use.
<electronic_eel>
yes. usually the values specified under recommended conditions are accompanied by some abs max values
<electronic_eel>
if you exceed these the device can be damaged.
<tnt>
and if they don't list them that means they don't guarantee anything ... which is the case here.
<electronic_eel>
yeah seems like it. I don't like it.
<electronic_eel>
If you don't want to exceed the 8mA the resistor needs to be 470. But 330 should work too (~10mA)
<gruetzkopf>
iirc that's not "this is dead" current, but the max current it can guarantee the output levels at
<electronic_eel>
gruetzkopf: yes, that is what I think too
<daveshah>
An old SiliconBlue datasheet gives 20mA absolute max
<electronic_eel>
but maybe lattice fears that if one port draws too much current it can have negative effects on timing and lead to glitches somewhere else
<daveshah>
not sure whether that number was accidently lost to the winds of time or removed deliberately
<tnt>
ah yeah, this says 20 mA per pin.
<electronic_eel>
that is for an lp, I looked at the hx datasheet
<daveshah>
The new LP datasheet doesn't have it either
<tnt>
but in any case in contention it's fighting another output driver ... which also has a limited output current and can't sink/source infinite current.
<electronic_eel>
tnt: true, but the lvc1t45 is much stronger