ChanServ changed the topic of #lima to: Development channel for open source lima driver for ARM Mali4** GPUs - Kernel has landed in mainline, userspace driver is part of mesa - Logs at https://people.freedesktop.org/~cbrill/dri-log/index.php?channel=lima and https://freenode.irclog.whitequark.org/lima - Contact ARM for binary driver support!
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<anarsoul> enunes: I've got 4 MRs without any review, could your review some when you have time?
<anarsoul> rellla: it'd be nice if you can help with reviews too
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<rellla> anarsoul: will do.
<rellla> btw. i had to sort out crashing and timeout tests for shader-db to not run oom ...
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<enunes> anarsoul: I'm starting to think there is no way to spill vec2 or vec3 registers
<enunes> can't convince the blob compiler to generate that, either it forces vec4 when I use vec3 or falls back to multiple load/store of vec1 when I use vec2
<enunes> and it makes sense, it is impossible to properly specify swizzle for a vec2 with a single 6-bit field for register
<enunes> vec1 is fine
<enunes> and guess what, ideas needs exactly a vec2 spill
<enunes> I wish I could test it by making it work with vec2/3 spilling temporarily disabled, but then regalloc fails
<enunes> need more tricks to further reduce register pressure so that it works spilling just some vec1 and vec4
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