09:19 <jbrunet> xdarklight: CCF (automatic) reparenting is good when the consumer does not have clue which input it should, such has the audio card and its 3 PLLs. It removed a lot of boiler code from many drivers. However, sometimes the consumer knows better. Its the case of the mmc (which has to pick fdiv2 through a specific path).

09:22 <jbrunet> unfortunately "Clock protection" is not the silver bullet here. If the net driver was to protect the picked input (MPLL2), it would prevent the audio card from setting the required. You'd have a working ethernet but a broken audio ... which makes me sad

09:26 <jbrunet> Managing (clock) use cases is hard and we cannot expect something that choice solely on "minimal delta to target" to get it right each time. It cannot "think ahead" or manage resources really.

09:26 <jbrunet> MPLL being multipurpose PLL are a ressource which we have to allocate in way. If you can do without it, you probably should

09:27 <jbrunet> Bottom line, I think that Gx (and following chips) should explicitly pick fdiv2, whether or not mpll is provided

09:28 <jbrunet> I remember that meson8 is slightly different, so maybe these chips could pick mpll (explicitly as well)

16:13 <asdf28> some android systems allow to reboot from an SD card using "adb boot recovery", does anyone know where the magic for this happens? in uboot?

16:17 <asdf28> it still seems to boot android for a second (the android boot logo appears), but then the SD card system starts

16:33 <hexdump0815> asdf28: i'm not sure but i think i have some android boot stuff seen in the u-boot source code - for instance for sm1 and g12a the android boot stuff is enabled by default i think

16:34 <hexdump0815> narmstrong: am i doing anything wrong or are there simply way less performance counters for sm1 that for for instance gxl? i get way less with "perf list" on sm1 than on gxl ...

16:36 <narmstrong> hexdump0815: no idea, maybe the cortex-a55 gives less counters

16:38 <hexdump0815> narmstrong: ok - seems it does not have any real hw counters at all like for mem or cache - and another a55 question: does the cache arch play any role for the kernel? a55 has per cpu l2 and shared l3 but in the case of sm1 l2 seems to be zero (which seems to be a valid option)

16:42 <asdf28> hexdump0815: thank you, do you know where to find the uboot source for this?

16:46 <asdf28> oh, never mind i googled it and found some android stuff in it

16:46 <asdf28> let's see if it's referenced there

16:49 <hexdump0815> asdf28: thats good as i did not find it quickly :)

16:51 <asdf28> i wouldn't have guessed that the amlogic uboot has android stuff hardwired into it

16:52 <narmstrong> asdf28: it has too much hardwired stuff

16:52 <narmstrong> hexdump0815: I have absolutely no idea

16:53 <asdf28> the interesting part is, how does it know that the user typed "reboot recovery" before the reboot

16:54 <narmstrong> u-boot can store a "reboot reason" in a non volatile register

16:54 <asdf28> ah!

16:55 <narmstrong> it was the good ol' time

16:56 <narmstrong> now Android has a special misc partition to "speak" with the bootloader with the BCB format

16:56 <narmstrong> because some SoCs can't store a reboot reason

17:05 <asdf28> this is all mystery to me

18:08 <asdf28> thanks, i understood the BCB thing now

18:09 <asdf28> what's interesting is that the uboot code only ever executes "run recovery_from_flash" when it sees the recovery BCB message

18:09 <asdf28> but never "run recovery_from_sdcard"

18:10 <asdf28> so maybe this was only possible using the old method?

22:30 <xdarklight> jbrunet: thanks for the explanation. I think the idea that we have come up with (always using the first input which is FCLK_DIV2 on GX and MPLL2 on Meson8b/Meson8m2) will be the way to go then. if we have some more advanced framework for fine-grained clock control then we can always switch to that