#linux-sunxi on 2017-10-27 — irc logs at freenode.irclog.whitequark.org

2015-02-18 19:37 Turl changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi

00:00 <lurchi_> Guest13123: thats typical for nand, in case one of the blocks is broken

00:00 <lurchi_> the bootloader tries to reads blocks until it finds one with correct checksums

00:01 <Guest13123> pmpp: how is the h3 nand?

00:01 <pmpp> i don't have any nand based h3

00:02 <Guest13123> ah.

00:02 <pmpp> only A23/A33 7" cheapo tab

00:02 <gnarface> Guest13123: not sure about any of this, but i do know that for the instructions i followed, it was mentioned specifically that while most partitioning software will safely skip the first 2MB by default, it's possible that some will not unless you explicitly tell it to. if your partitioning software defaults to starting right at 0 that may be a mistake

00:03 <gnarface> Guest13123: i mean, that may be the mistake

00:03 <Guest13123> gnarface: are you sure that's not referring to mmc/sd rather than nand?

00:03 <gnarface> Guest13123: no, i'm not sure of that, but i took it to be non-media-specific

00:04 <Guest13123> nand does not have a dos mbr. its partition table has a completely different structure

00:05 <gnarface> that's something the nand chooses? i thought that was something the OS chooses

00:05 <Guest13123> well, i'm pretty sure the boot rom chooses it

00:06 <gnarface> but u-boot doesn't read partition tables, it just reads from a raw memory sector on the disk. it needs filesystem support but afaik it's partition-table agnostic

00:06 <gnarface> i thought, at least. maybe i have that wrong...

00:06 <Guest13123> yeah, but something reads u-boot itself from the nand, too

00:06 <lurchi_> gnarface: u-boot *does* read partition tables, MBR, GPT, ...

00:07 <gnarface> hmmm. i'm out of my depth then

00:07 <gnarface> nevermind me

00:07 * gnarface goes back to struggling with it

00:08 <Guest13123> the wiki says boot0 chains to u-boot, but boot0 has to be stored somewhere, too

00:10 <lurchi_> boot0, or alternatively U-Boot SPL, stored at a fixed position

00:10 <Guest13123> yes, but obviously that position is not zero

00:10 <lurchi_> 32k for current SoCs, at least for SD and eMMC

00:11 <Guest13123> it's 8k for SD

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00:14 <Guest13123> the "bootloader" partition (FAT) starts at 16MB. could it be a fixed location within that?

00:14 <lurchi_> no, thats the third bootloader stage

00:15 <Guest13123> the wiki says there is no third stage on later chips

00:15 <lurchi_> ROM bootloader -> SPL (u-boot/boot0) -> TPL (proper U-Boot)

00:16 <Guest13123> OK, if you count rom

00:16 <lurchi_> its not part of the chip, but the way u-boot is designed

00:17 <Guest13123> i think boot0 might be loading the kernel (at least in the original firmware)

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00:20 <pmpp> didn't you found env part with boot.scr ?

00:21 <pmpp> i found mine in nanb https://pastebin.com/raw/Z19MdU3f

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00:26 <Guest13123> pmpp: yes, but that's just the env

00:26 <pmpp> so you know which is kernel and env that give you not much left :p

00:31 <Guest13123> the partition called "boot" is the kernel (nandc)

00:31 <Guest13123> but that does not tell me where the SPL is

00:33 <Guest13123> and aside from the original firmware still on the nand, the only kernel i have successfully booted is mainline, but that cannot read nand

00:34 <Guest13123> in the logs of this channel, MoeIcenowy mentioned better progress a while back, but i have not been able to duplicate it

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05:50 <montjoie> dwmac-sun8i merged in net!

05:51 <MoeIcenowy> wow

05:52 <MoeIcenowy> exciting

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09:21 <MoeIcenowy> mripard: U-Boot ethaddr code now cannot give ethernet labels that doesn't exist in U-Boot dtb but exists in Linux dtb mac addresses

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09:35 <MoeIcenowy> mripard: patch sent for this

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11:02 <jogoes> Hi, Anybody knows if is possible to use more than one slave with the V3S chip SPI peripheral? I have been reviewing the V3S datasheet, but I can only find one chip select (CS0).

11:08 <MoeIcenowy> jogoes: you can use GPIO CS

11:08 <MoeIcenowy> why is there more and more people playing with V3s?

11:08 <MoeIcenowy> interesting

11:09 <jogoes> But, is there any dedicated GPIO for Cs1, Cs2 and Cs3 ?

11:10 <jogoes> the datasheet states that is possible to use up to 4 spi CS slaves

11:10 <jogoes> But i have seen that normally only CS0 is used, and the SPI peripheral is normally connected to a flash memory slave

11:11 <MoeIcenowy> no

11:11 <MoeIcenowy> the IP block has 4 CS's, but only one is wired to the pin controller

11:12 <jogoes> So physically, only is possible to connect CS0 to external slaves, right?

11:13 <MoeIcenowy> yes

11:13 <MoeIcenowy> but the Linux SPI framework allows you to use GPIOs as extra CS's

11:16 <jogoes> I was trying to add a second SPI slave to my board, and adding a second chip select on the .fex file, but I was not succesful. I got problems with the flash memory and also I could not make appear the spi devices on /dev/spidev

11:17 <jogoes> I was expecting to get something like dev/spidev/spi0.0 and dev/spidev/spi0.1

11:17 <jogoes> But i got nothing

11:19 <MoeIcenowy> I think FEX maybe not able to activate GPIO CS

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11:19 <jogoes> So... do you know what would be the way for activating those extra CS?

11:33 <jogoes> Btw, MoeIcenowy, thank you for your answers and help

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12:31 <Guest13123> MoeIcenowy: and do any of your A33 tablets have such an SPI peripheral in their fex? this one does

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12:58 <Pe3ucTop> MoeIcenowy: sorry, but could you direct of any example/documentatino of using GPIO as CS for SPI ? I'm realy interested in it too.

13:02 <beeble> Pe3ucTop: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/spi/spi-bus.txt#n31

13:03 <Pe3ucTop> and do it's possible to mix hw CS and GPIO CS ?

13:03 <Pe3ucTop> beeble: thanks, will get a look.

13:04 <beeble> yes it is

13:06 <Pe3ucTop> I'm going to be happy and will have big rework of design, urrr..

13:07 <MoeIcenowy> In fact in Linux the native CS should also be toggled by spi framework

13:08 <MoeIcenowy> https://github.com/torvalds/linux/blob/master/drivers/spi/spi-sun6i.c#L269

13:09 <Pe3ucTop> Than it already is possible in V3s, going to try.

13:11 <Pe3ucTop> Do anyone knov is it possible to control Ethernel LEDs as GPIO ? I do not need those main function, but I do need additional GPIOs.

13:11 <Pe3ucTop> ?

13:12 <Guest13123> Pe3ucTop: the ledtrigger drivers

13:12 <Guest13123> at least in mainline

13:12 <MoeIcenowy> I think it's not possible

13:13 <MoeIcenowy> ledtrigger is used for the contrast -- use random GPIO as Ethernet LEDs

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13:14 <MoeIcenowy> The Ethernet LED is directly controlled by the Ethernet PHY

13:14 <Guest13123> Pe3ucTop: do you mean an LED that is on the port? or elsewhere on the board?

13:15 <Pe3ucTop> Guest13123: yes, LEDs connected to Ethernet phy.

13:16 <Guest13123> i thought you meant you wanted to use an additional LED on the board as an eth LED. sorry

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13:17 <Guest13123> MoeIcenowy: was this commit related to bootability? https://github.com/Icenowy/linux-kernel-lichee-a33/commit/59ab1e65df9badd10e049bfc8bb7092cdc5e9a5b

13:18 <Pe3ucTop> ok, no problem, but I anyway going to check ability to control those pins by sw. I know some phy are able to switch those pins mode. So why those could not be as i2c/mdio controled GPIOs :)

13:18 <MoeIcenowy> yes for building the quite old lichee linux you need to use the quite old toolchain

13:19 <Guest13123> ahh, that might be why i can get only mainline to boot

13:19 <MoeIcenowy> nope

13:19 <Guest13123> no?

13:19 <MoeIcenowy> when I'm using gcc 4.9

13:19 <MoeIcenowy> it can boot

13:19 <MoeIcenowy> but hang when trying to clean display

13:19 <MoeIcenowy> to boot legacy kernel with mainline u-boot

13:19 <MoeIcenowy> you will need set two u-boot env varsa

13:19 <MoeIcenowy> s/varsa/vars/

13:20 <Guest13123> using 4.8 here, and it hangs on Booting kernel...

13:20 <MoeIcenowy> setenv bootm_boot_mode sec; setenv machid 1029

13:20 <Guest13123> hmm, i missed the machid one

13:20 <Guest13123> was only setting boot mode

13:21 <Guest13123> btw, does bootm_boot_mode also apply to bootz?

13:22 <MoeIcenowy> bootz seems to be not able to boot legacy kernel

13:23 <Guest13123> OK. why does mainline U-boot ignore the boot.scr passed to it in ram via FEL?

13:23 <MoeIcenowy> I don't know...

13:24 <Guest13123> so usb boot simply isn't possible?

13:26 <MoeIcenowy> it is

13:26 <MoeIcenowy> maybe you should check your setup

13:27 <Guest13123> U-boot loads over usb, but then the text scrolls by quickly, so i can't be sure of the error, but it is the same in the end as when boot.scr is not found

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13:56 <jernej> ‎Guest13123‎: You have to use a bit different file, not boot.scr directly.

13:56 <jernej> it is a plain text file and first line has to be: #=uEnv

13:56 <jernej> so, it is actually uEnv.txt format

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14:43 <Guest13123> MoeIcenowy: did you get a33 nand recognized in mainline?

14:44 <Guest13123> kernel, that is

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18:03 <Guest74993> pmpp: FWIW, since i set the machid in the env, i can boot the legacy kernel from usb, but still not from mmc

18:03 <Guest74993> i'm probably missing something simple

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19:55 <Guest74993> pmpp: hi

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20:38 <hanetzer> heyo o/

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23:44 <wubbalubbadupdup> Hello, I can't get a confirmation email

23:45 <wubbalubbadupdup> Besides, is there to-do, I may contribute by driver dev

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23:46 <anarsoul|2> wubbalubbadupdup: http://linux-sunxi.org/Linux_mainlining_effort

23:49 <wubbalubbadupdup> Thanks