rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*
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<MoeIcenowy> wens, mripard: btw I think the exclusivity of TCON clocks are not enough
<MoeIcenowy> the protect only starts after display is on
<MoeIcenowy> but in the HDMI situation the downstream encoder changed the pll-video and affected TCON
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<wens> you'll probably need clk notifiers to do fix-ups
<wens> got an s905 to play with
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<MoeIcenowy> wens: how about get exclusivity when first set rate?
<wens> that probably works
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<wens> I've been trying to hack xf86-video-armsoc to make it play nice with systemd-logind :/
<KotCzarny> maybe it needs other way around helping. ie systemd needs fixing?
<jernej> or switch to wayland? :)
<wens> jernej: that would involve switching to GNOME :/
<jernej> MoeIcenowy: I think that the issue may be that HDMI PHY clock doesn't check if current parent clock is suitable
<jernej> all clocks in sunxi-ng clk driver do
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<jernej> but better yet, best fix would be that NM clk driver doesn't allow to reuse parent clock outside of min and max rate
<jernej> so, 128 MHz shouldn't be allowed to be reused
<jernej> 128 MHz definetly works by luck
<jernej> if you use different factors to generate 128 MHz, it won't work
<jernej> wens: surely there is some lightweight wayland desktop?
<hanetzer> jernej: sway. basically i3 wayland :P
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<jernej> hm... I'm not sure if I like i3 principle
<hanetzer> jernej: also weston, though that's more of a toy than a 'real' de
<jernej> yeah, that's why I didn't mentioned it
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<wens> there's mutter, which is part of GNOME, but can be stand alone
<wens> though ultimately I want to want chromium w/ GL ES
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<wens> want to run *
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<jernej> does chromium work well with GL ES?
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<wens> I assume their compositing stack supports it, given it runs nicely on Android
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<MoeIcenowy> to be honest I don't like wayland
<MoeIcenowy> it's too far from mature
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<wens> at least got armsoc to work with recent Xorg
<wens> now getting a load of "[drm:__setplane_check] Invalid pixel format AR24 little-endian ..." messages
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<wens> seems either zpos or alpha is incorrectly set lol
<KotCzarny> by wayland or systemd?
<wens> xf86-video-armsoc
<KotCzarny> interesting, generic bug then
<wens> ah, looks like you're supposed to provide a function that configures the cursor plane properly
<wens> which the sun4i driver in armsoc didn't
<KotCzarny> then not. ;)
<wens> rebuild and try again
<wens> though my desktop is completely black, instead of having some nice wallpaper
<wens> so something else is broken
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<wens> looks like bogus alpha channel data
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<MoeIcenowy> jernej: yes the exclusivity seems to break A83T HDMI
<MoeIcenowy> seens to be because the TCON exclusivity not enough
<MoeIcenowy> (HDMI clock is correctly set but TCON clock is affected by HDMI
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<MoeIcenowy> jernej, wens: maybe mode_set should not touch the real clock but save the clock inside the driver, and let enable to really set clock?
<MoeIcenowy> oh save is also not needed as crtc stores the clock
<wens> IIUC, the tcon and hdmi clocks are selecting different dividers for the same dotclock?
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<MoeIcenowy> wens: no
<MoeIcenowy> but I think they affect upper PLL state
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<MoeIcenowy> wens: how to convert a not atomic encoder driver to atomic?
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<wens> huh?
<MoeIcenowy> I think currently sun8i_dw_hdmi is not atomic
<wens> looks atomic to me
<MoeIcenowy> wens: but should atomic encoder use atomic_mode_set rather than mode_set?
<MoeIcenowy> (I don't know well about atomic KMS
<MoeIcenowy> oh seems that mode_set is optional for atomic?
<MoeIcenowy> (not forbidden
<wens> either one can be used
<MoeIcenowy> oh ok
<wens> atomic_mode_set gives you access to connector info
<MoeIcenowy> yes
<MoeIcenowy> verified by rewrite it to atomic_mode_set
<MoeIcenowy> wens: btw is it not possible to directly get dotclock from a struct drm_encoder in atomic?
<wens> you mean the target?
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<MoeIcenowy> wens: I mean when enable()
<MoeIcenowy> the encoder's enable() and disable() has only one parameter -- of course the encoder
<MoeIcenowy> currently I save the clock to struct sun8i_dw_hdmi in mode_set
<wens> you can fetch the currently connected crtc, and access its struct drm_display_mode
<MoeIcenowy> the comment in drm_encoder.h says the crtc property is only available in non-atomic
<MoeIcenowy> and the suggestion is to access the drm_connector_state
<MoeIcenowy> which is not available in enable() and disable()
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<MoeIcenowy> jernej: this branch finished your 3 tests (boot w/ monitor, boot w/o monitor and plug in, on-fly mode change) on A83T/H3/R40
<MoeIcenowy> I will test dual-head on Pinebook tomorrow
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<wens> you shouldn't need to remember exclusivity in the hdmi phy driver
<wens> just pair them with clk_enable / clk_disable, which should already be balanced
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<jernej> MoeIcenowy: I still don't believe that exclusivety is the solution, only precaution
<jernej> uh, one feature of "exclusive" clocks which I don't like
<jernej> is that you can set any rate to exclusively held clock by something else
<jernej> and it will always succed but in reality, rate won't be set
<jernej> that might be one of the issues you observed
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<jernej> hopefully I'll have time to test two possible solutions today
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<MoeIcenowy> wens: this will lead meaningless clock frequencies to be locked
<MoeIcenowy> only set the exclusivity when the clock is set to meaningful value
<MoeIcenowy> and set the exclusivity as soon as possible when the clock is set
<MoeIcenowy> this is the principle of this patchset
<MoeIcenowy> jernej: this is not
<MoeIcenowy> all problem I have seen is because of exclusivity not enough
<MoeIcenowy> not set or not set in the correct time
<jernej> only on A64?
<MoeIcenowy> and it's also why I make this patchset
<MoeIcenowy> the key problem on A64 is also the TCON exclusivity is set when enabling, not when setting clock
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<MoeIcenowy> and the clock has changed before setting the exclusivity
<MoeIcenowy> so the exclusivity become useless
<MoeIcenowy> and even evil
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<MoeIcenowy> tllim: long time no see :-)
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<MoeIcenowy> jernej: btw the 192MHz constraint explains why U-Boot display cannot work on HP ZR24w
<MoeIcenowy> (also entering Linux cannot fix this
<MoeIcenowy> because the dotclock is 154MHz
<MoeIcenowy> and the PLL is set to 154MHz
<MoeIcenowy> which is not working
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<micken> plop
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<micken> I have implemented dma transfers in my mmc driver.. (riscos/pinebook). However CMD23 fails to complete (no cc in rint and recv req in rint). Why do I get recv bit set in rint?
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<jernej> MoeIcenowy: Can you try last 7 patches from here: https://github.com/jernejsk/linux-1/commits/clk_experiment
<jernej> I think that all should go in kernel at one point
<jernej> no matter if your locking goes in or not
<jernej> MoeIcenowy: IMO those patches should solve your issue without locking
<jernej> but I might be wrong
<jernej> could you please test?
<jernej> I will definetly improve commit logs (I was writing too fast...)
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<micken> what relation has fifo water level and dma transfer size? The only way I can get reliable dma transfers for mmc is with 8k buffers, and that means slow speed
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<micken> it works with bigger transfers up to a point where no command completes
<MoeIcenowy> jernej: even if it can solve it without locking it's not any reason to prevent lock
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