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00:34
<
MoeIcenowy >
jernej: on A64 it seems that HDMI cannot output with TCON1/TMDS/PHY clocks are from PLL-VIDEO1
00:34
<
MoeIcenowy >
clock freq in clk_summary is correct
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00:38
<
MoeIcenowy >
this is discovered by using dual-head, and let tcon0 occupy pll-video0
00:44
<
MoeIcenowy >
btw jernej: where documents the input mux of hdmi-phy-clk?
00:45
<
anarsoul|2 >
MoeIcenowy: it should work, you just need to set minimal and maximal values for pll-video1
00:46
<
anarsoul|2 >
MoeIcenowy: what's current frequency for pll-video1?
00:46
<
MoeIcenowy >
308MHz
00:46
<
MoeIcenowy >
which is a mild value
00:46
<
anarsoul|2 >
probably too low
00:46
<
anarsoul|2 >
try 616?
00:47
<
MoeIcenowy >
I think jernej mentioned the 192MHz lower bound
00:47
<
anarsoul|2 >
MoeIcenowy: well, pll-mipi didn't work for me if it was around 300MHz
00:47
<
anarsoul|2 >
there could be the same limitation for pll-video1
00:48
<
MoeIcenowy >
anarsoul: btw have you patched the enable bit for pll-mipi?
00:48
<
anarsoul|2 >
MoeIcenowy: I didn't, but I haven't sent patch upstream
00:48
<
MoeIcenowy >
didn't?
00:48
<
MoeIcenowy >
without the patch I think pll-mipi cannot work
00:48
<
anarsoul|2 >
sorry, a typo
00:49
<
anarsoul|2 >
feel free to send patch upstream
00:49
<
MoeIcenowy >
btw pll-video1 should be similar to pll-video0, not to pll-mipi
00:50
<
anarsoul|2 >
who knows... I would try higher clock for pll-video1
00:53
<
MoeIcenowy >
tried 462MHz
00:53
<
MoeIcenowy >
still cannot work
00:54
<
anarsoul|2 >
can pll-video1 be source of tcon0?
00:54
<
MoeIcenowy >
tcon0 can only accept pll-mipi and pll-video0
00:54
<
MoeIcenowy >
and pll-mipi is downstream of pll-video1
00:54
<
MoeIcenowy >
s/1/0/
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03:23
<
wens >
finally got mali to work :)
03:24
<
wens >
on the a20 it stalls; on the h3 it works nicely
03:24
<
MoeIcenowy >
wens: 400 or 450?
03:27
<
MoeIcenowy >
jernej: tried your patch
03:28
<
MoeIcenowy >
more ridiculous
03:28
<
MoeIcenowy >
a lot of clocks gets 1
03:28
<
MoeIcenowy >
and it fixes nothing
03:34
<
MoeIcenowy >
oh you didn't check the existance of the constraints before checking with the contraints
03:37
* anarsoul
made same mistake recently
03:37
<
MoeIcenowy >
after fixing this flaw, the code works as expectde
03:37
<
MoeIcenowy >
expected
03:39
<
MoeIcenowy >
and thankfully this also fixes the issue that after problematic U-Boot wrongly initialized clock Linux cannot driver HP ZR24w
03:45
<
wens >
lol, chromium package does not include angle libraries, so it can't use egl/gles
03:45
<
wens >
I guess I should try to build my company's product and see if it runs lol
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03:49
<
MoeIcenowy >
jernej: btw I changed 1 to 0 and it works
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<
jernej >
MoeIcenowy: ah, I forgot to check maximum, sorry
04:55
<
jernej >
I mean if maximum is set
04:55
<
jernej >
so, does it help with 48 MHz <-> 32 MHz issue?
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<
wens >
glmark2 score: 19 :/
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05:59
<
KotCzarny >
at least it finishes
05:59
<
KotCzarny >
which is a good start
05:59
<
KotCzarny >
intel 945gm has ~30
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<
wens >
is there a reason why vi layers are registered before ui layers?
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06:06
<
KotCzarny >
subtitles?
06:06
<
KotCzarny >
and/or mouse pointer
06:06
<
wens >
I meant in the drm driver, not zpos or anything
06:06
<
KotCzarny >
might be the same reason tho
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<
MoeIcenowy >
wens: vi channel is before ui channel in memory space
06:13
<
MoeIcenowy >
wens: try to minimize the glmark2 window and you will get a hugh score gain
06:14
<
MoeIcenowy >
s/hugh/huge/
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06:14
<
MoeIcenowy >
KotCzarny: caught another 945 user ;-)
06:14
<
MoeIcenowy >
945 is really Mali-400 level GPU ;-)
06:14
<
KotCzarny >
thinkpad x40 ftw!
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<
wens >
es2gears has transparent background... weird
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<
wens >
MoeIcenowy: IIUC mali-450 requires the r7p0 driver?
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<
MoeIcenowy >
wens: maybe
11:23
<
wens >
can't seem to get it to work with r6p2
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<
wens >
well it works with amlogic's r6p1 mali-450-x blob
11:41
<
wens >
no license for it though :/
11:41
<
wens >
and es2gears is only 4.2 FPS
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11:55
<
MoeIcenowy >
wens: check kernel driver
11:55
<
MoeIcenowy >
is pmu irq properly passed?
11:56
<
wens >
the kernel driver doesn't claim the pmu interrupt
11:56
<
wens >
and for mali-450, only the pp broadcast (not the individual pp) interrupt is firing (and also the gp)
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<
ptz_ >
how do i build a 4.14 kernel?
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<
ptz_ >
is there any set of sunxi patches i can apply to 4.14 vanilla, or is there any way to go to a commit in linux-sunxi?
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<
MoeIcenowy >
wens: it should claim pmu interrupt
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<
wens >
according to the extra patch, it is retrieved but never requested, so it won't show up in /proc/interrupts
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14:40
<
MoeIcenowy >
wens: carefully check the code
14:40
<
MoeIcenowy >
I think it's a bug
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14:57
<
rex >
Hey guys, is it possible to somehow use a USB Micro USB cable for getting a serial on an h3 board?
14:58
<
rex >
e.g. a smart phone charger cable
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15:00
<
wens >
MoeIcenowy: the original arm driver doesn't need an interrupt for pmu
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<
MoeIcenowy >
wens: I think it need one
15:12
<
MoeIcenowy >
at least when you claiming your variant is with pmu
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<
willmore >
rex, If it's an OTP port you should be able to use the gadget interface to make the h3 board look like a serial device. I have never done it and don't really have any more guidance.
16:14
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rex >
you mein OTG?
16:15
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willmore >
Yes, sorry, been dealing with microcontrollers for the last few days. :)
16:16
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rex >
np :) But if I understand you right I should just get an UART to USB Converter?
16:18
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willmore >
No, you would hook a normal usb cable to the H3 OTG port and the H3 box would appear as a USB/serial device.
16:18
<
willmore >
If you want, it may be easier to get a cheap USB/serial board and just hooking to the H3's serial port. That's always an option.
16:19
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rex >
oh so if i use a normal smartphone usb cable there can nothing go wrong?
16:19
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rex >
I am a little worried about current flowing the wrong way
16:19
<
rex >
or basically any current flowing at all
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willmore >
rex depends on how the H3 board is designed. Some are designed to be powered over that port. Wait a bit and someone with more experience may show up.
16:22
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rex >
ok thx willmore!
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<
willmore >
NP, good luck.
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miasma >
rex: there's a page about otg/serial gadget in the wiki
16:47
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rex >
Can I change the role without rebooting?
16:48
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miasma >
depends on the kernel, but by default, i suppose so
16:48
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miasma >
i've only used the static configuration compiled in
16:49
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rex >
Well I connected my board with a pc and it is shown in the pc as a mass storage device
16:49
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miasma >
the configuration is done via configfs iirc
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rex >
Can you point me in the right direction in the configfs?
16:55
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miasma >
< miasma> i've only used the static configuration compiled in
16:56
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rex >
I'll see if /sys has answers :)
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