rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*
<smaeul> megi: H6 is sun50iw6. sun50iw3 is A63
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<tuxd3v> Does any one knows were can I find the DVFS driver for H6 on kernel 5.8?
<tuxd3v> could it be:
<tuxd3v> CPU Power Management > CPU Frequency scaling > Allwinner nvmem based SUN50I CPUFreq driver
<tuxd3v> ?
<tuxd3v> also I can't find the SPI driver for H6 :(
<tuxd3v> thanks in advance
<mirko> spi is probably CONFIG_SPI_SUN6I
<mirko> and if it isn't, then it's CONFIG_SPI_SUN4I ;)
<tuxd3v> thanks mirko :)
<tuxd3v> I believe both options are:
<tuxd3v> Allwinner A10 SoCs SPI controller
<tuxd3v> Allwinner A31 SPI controller
<tuxd3v> in the menuconfig
<tuxd3v> if its like that :)
<mirko> as far as i know option name and description usually mention the first supported device
<mirko> which later on turns into a group of devices - it's like that for lot's of sunxi kernel config options
<mirko> it's easy to get confused - best is to rely on maintained defconfigs i'd say
<tuxd3v> yeah its like going to hunt a specific rabit in hole world :D
<tuxd3v> now I just don't know if I have them correctly enabled lol
<smaeul> H6 is CONFIG_SPI_SUN4I
<tuxd3v> smaeul, thanks a lot :)
<smaeul> the best way to know is to find the node in the device tree, then grep the source for the compatible
<smaeul> here, the last/most generic compatible is allwinner,sun8i-h3-spi, so git grep finds:
<smaeul> drivers/spi/spi-sun6i.c: { .compatible = "allwinner,sun8i-h3-spi", .data = (void *)SUN8I_FIFO_DEPTH },
<mirko> smaeul: wait, that means h3's spi is CONFIG_SPI_SUN6I ?
<mirko> but h6 is CONFIG_SPI_SUN4I?
<smaeul> ugh, I meant CONFIG_SPI_SUN6I
<smaeul> *H6 is CONFIG_SPI_SUN6I
<mirko> ah - *phew* :)
<tuxd3v> Prompt: Allwinner A31 SPI controller
<smaeul> sorry, I copy/pasted from the wrong line
<tuxd3v> Depends on: SPI [=y] && SPI_MASTER [=y] && (ARCH_SUNXI [=y] || COMPILE_TEST [=n]) && RESET_CONTROLLER [=y]
<tuxd3v> I believe I have it enabled :)
<mirko> tuxd3v: you know in kconfig you can search for symbol names right? :)
<tuxd3v> I have done that :)
<mirko> (by pressing '/' - like in vim - opens a prompt)
<tuxd3v> yup :)
<mirko> ok :)
<smaeul> or F8 in nconfig
<mirko> i'm always afraid of F-keys being grabbed by whatever layer before (e.g. window manager or whatever..)
<smaeul> then you can use 8 instead :)
<tuxd3v> nice trick :)
<tuxd3v> for H6 I couldn't find a DVFS driver, at least not in the place were I searched for it..
<tuxd3v> in drivers
<mirko> tuxd3v: where did you get the src from? repo url and branch?
<tuxd3v> I got the oficial kernel release from www.kernel.org
<tuxd3v> 5.8
<mirko> i don't think it got upstreamed yet - at least i remember megous mentioning it got enabled in his branch quite recently - however maybe that only was for specific boards..
<mirko> which h6 based board are you running on?
<tuxd3v> I am on OrangePi One Plus
<mirko> then you should really use megous branch
<mirko> there's a lot in there which is not yet upstream
<smaeul> CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM is the correct option for H6 DVFS
<tuxd3v> smaeul, thanks, yeah I believe I have it enabled, but its in:
<tuxd3v> CPU Power Management > CPU Frequency scaling section
<tuxd3v> I was expecting it into Device Drivers :)
<tuxd3v> yeah its the NVMEM driver :)
<tuxd3v> thanks
<smaeul> the DVFS section in Device Drivers is for DVFS of everything *except* CPUs (so DRAM, GPU, etc.)
<tuxd3v> mirko, well yeah megous should indeed have something there :)
<tuxd3v> smaeul, ho, I didn't knew that, so its ok then
<tuxd3v> thanks a lot :)
<tuxd3v> now I just need to enable wireguard and test :)
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<Ashleee> one day I wish that kernel menuconfig was sorted and had identical naming :) not "Realtek 8211" and after that "A64 Allwinner: for example :) so you could actually find what you are looking for.
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<karlp> I'm trying to use a ov5640 csi camera on an oragne pi pc plus, but I don't seem to have the video dev node created for it? I can do modprobe sun6i-csi and ov5640 ok, but... ?
<karlp> I suspect the csi node is still disabled in device tree? is there any working board I can copyt from?
<karlp> looks the most up to date
<karlp> thought some of this was going to be much more out of the box :)
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<karlp> well, ok, lcd works :)
<karlp> or at least, I get a console boot log on it...
<tuxd3v> karlp, you don't see the /dev/video0 node created on boot?
<karlp> I have a vide0, btu it's cedrus.
<karlp> I prsume I need a video1, will get back to the camera next, just trying to wrp up the lcd display now
<karlp> (at least the display, touch later)
<tuxd3v> karlp, maybe you are right and /dev/video0 is for cedrus
<karlp> I've been trying to trim this snippet down to the minimal required: https://forum.armbian.com/topic/11701-35-lcd-ili9486-with-orange-pi-zero/
<karlp> but does anyone know what the "bgr" attribute is? I cna't find that in any device tree binding file
<pmp-p> bluegreenred?
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<karlp> hrm, I could try setting it to 1 and see if the colours get mixed up I guess?
<karlp> hrm, doesn't seem to have any affect.
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<hexdump0815> Ashleee: looks like the h6 1.0 bsp is available still here: http://dl.linux-sunxi.org/H6/ for libdram and bl31 - i'll adjust my doc
<hexdump0815> Ashleee: for me the libdram in that bsp was the only one which worked well - even newer ones did not work ... so maybe give that one a try
<hexdump0815> Ashleee: should be this version - DRAM VERSION IS V2_2 ... bsp link fixed in my readme
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<karlp> hrm, I thought compatible could have a list of things, and it would look down them all if it couldn't find htem?
<karlp> I tried: compatible = "xptek,xpt2046", "ti,tsc2046", "ti,ads7846";
<karlp> but it doesn't probe the touch controller until I just give it >> compatible = "ti,ads7846"; <<
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<karlp> ok, well, ts_calibrate/ts_test works on the screen, so that's pretty neat for the day I guess.
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<Ashleee> hexdump0815, thanks! :) will try after dinner
<Ashleee> hexdump0815, did you re-adjust the args to libdram in any way? or did you use the stock uboot ones you posted?
<Ashleee> hexdump0815, ooh! :)
<Ashleee> DRAM SIZE =4096 M
<Ashleee> 2048 MiB
<Ashleee> Trying to boot from MMC1
<Ashleee> DRAM simple test OK.
<Ashleee> no atf and thus no tpl?
<jernej> AW port doesn't use tpl (for now)
<Ashleee> wait which aw port?
<jernej> I mean for any AW SoC in general
<Ashleee> even in32bit mode?
<Ashleee> I thought it jumps back to spl when libdram is initialized, switches to 64bit mode, which calls atf to switch back to tpl
<jernej> well, just build U-Boot in 32-bit mode and you should get to the prompt
<Ashleee> s/to/and then
<Ashleee> hmm :)
<jernej> I usually patched Kconfig for that
<Ashleee> also I could grab a proper dtb/config for my board eh?
<Ashleee> was using eachlink one
<jernej> eachlink should be compatible for this stage
<Ashleee> yeah looks like there's no difference except dtb
<jernej> anyway, can you give me a link to the branch you're currently using?
<Ashleee> but it gets stuck on "Trying to boot from MMC1"
<Ashleee> branch eachlink-h6-mini-WIP
<jernej> Ashleee: here is my hack for getting fully 32-bit U-Boot: https://github.com/jernejsk/u-boot/commit/11d35f15d36f79a616bbc54d9bfa31f9d503c19a
<Ashleee> thanks
<jernej> this should allow you to reach prompt, but you won't be able to boot linux
<jernej> anyway, enough to read DRAM registers
<jernej> I'm really interested which registers are set differently
<Ashleee> so am I, but dinner first :)
<Ashleee> which register range do you need? 0x402000 - 16K?
<Ashleee> (or whatever it was, need to check again the datasheet)
<jernej> just dump whole DRAM register range according to datasheet
<jernej> we'll parse it later
<Ashleee> "0
<Ashleee> :)
<Ashleee> after dinner! :)
<Ashleee> apparently flashing fully 32bit u-boot-sunxi-with-spl.bin works fine, too
<Ashleee> just need to hold the bloody serial pins on there by hand, did not bother soldering the connectors yet
<Ashleee> hexdump0815, just wondering if it is the 32bit uboot or somewhere in the DTB that it sees only 2GB RAM instead of 3GB :)
<Ashleee> DRAM SIZE =4096 M
<Ashleee> DRAM simple test OK.
<Ashleee> 2048 MiB
<jernej> it's probably DRAM size detection function
<jernej> it should be fixed on a bit newer U-Boot
<jernej> you can try to rebase it...
<Ashleee> :)
<Ashleee> I'd rather go fully upstream without libdram :D
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<jernej> Ashleee: great, now you must dump registers from mainline
<Ashleee> :P
<jernej> but for that you have to add printf to DRAM init code
<Ashleee> if I only had a spare board that was not mounted in a rack... :D
<Ashleee> or I can just boot a working one?
<jernej> well, if it works, then there is not much to fix...
<jernej> better dump regs from non working one
<Ashleee> hmm :)
<Ashleee> the rest of sizeof(mctl_whatever) is 0
<Ashleee> the regs are completely weird, wtf
<Ashleee> compared to libdram
<Ashleee> unless my dumping code is wrong :D
<jernej> paste code diff?
<Ashleee> it was
<Ashleee> now I am getting much closer numbers
<Ashleee> this is the correct https://pastebin.com/yd4rbrKM
<Ashleee> let's see
<Ashleee> see four bits off in the first word
<Ashleee> and some other bits.. let's see the struct
<jernej> hm... this has almost all values set to 0
<jernej> when does it fail?
<jernej> what is printed on serial?
<Ashleee> it's dumped at Error while initializing DRAM PHY!
<Ashleee> the ver word, whatever it is, has those 4 bits off
<Ashleee> let's see where it is set
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<hexdump0815> nice to see some life coming back into this u-boot mem topic :) ... libdram for me also only detected 2gb of ram and ignored everything above, but i guess if you get mainline u-boot somehow working this topic will be history ...
<Ashleee> wait am I even in the correct memory place?
<Ashleee> I am dumping 0x4002000
<Ashleee> but phy0_base is at 0x4005000 hm :)
<jernej> yes, there are actually 3 parts in same memory space
<jernej> second and third have some documentation available on net but first one has none afaik
<Ashleee> https://pastebin.com/rY8hphCe there better
<Ashleee> pgcr3 is off
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<jernej> Ashleee: can you try to hardcode those four cr bits here: https://gitlab.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-sunxi/dram_sun50i_h6.c#L682
<Ashleee> right ahead of you :)
<jernej> are you sure pgcr3 is off? 0x400501c, right?
<Ashleee> pgcr2
<Ashleee> I meant
<Ashleee> 13bf vs 9e0
<Ashleee> it's not written in the code anywhere
<Ashleee> still error :(
<Ashleee> more bits!
<jernej> pgsr1 is also pretty different
<jernej> but that is only status
<Ashleee> hmm vim fail :)
<Ashleee> looking at https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html registers x200 and onwards could be useful to check
<Ashleee> as they are training configuration
<Ashleee> dtcr1 has one bit off, regarding training, set different from default value
<Ashleee> dtedr are readonly, that's different as well though, probably result of training
<jernej> what is your dram_tpr13 value?
<jernej> for libdram
<Ashleee> uf
<Ashleee> it was either 0x2000 or 0x2001
<Ashleee> one of those didn't work
<jernej> anyway, it's quiet possible that there are multiple issues...
<Ashleee> it's that bit§!!!
<Ashleee> U-Boot SPL 2020.07-rc5-00001-g12ce13d8b6-dirty (Aug 04 2020 - 20:19:36 +0000)
<Ashleee> Trying to boot from MMC1
<Ashleee> DRAM: 8192 MiB
<Ashleee> NOTICE: BL31: v2.2(release):v2.2-dirty
<Ashleee> NOTICE: BL31: Built : 15:37:28, Jul 1 2020
<Ashleee> NOTICE: BL31: Detected Allwinner H6 SoC (1728)
<Ashleee> NOTICE: BL31: Found U-Boot DTB at 0xc06f218, model: Tanix TX6
<Ashleee> NOTICE: PMIC: Probing AXP805
<Ashleee> 5GB thou :D
<Ashleee> 8
<Ashleee> gets reinited to 3GB
<Ashleee> but i POSTed! :)
<Ashleee> and went through ATF
<Ashleee> it's the dtcr1 reg
<Ashleee> the one bit
<Ashleee> RANKEN
<Ashleee> to 1 from 3
<Ashleee> so enabling only bottom rank, not both
<jernej> do you have any other modifications here beside this?
<Ashleee> oh master branch has something else than last 2020-rc5
<Ashleee> nope
<Ashleee> I was on rc5
<jernej> I suggest you work on latest U-Boot master branch
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<jernej> so you have all changes
<Ashleee> yeah
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<Ashleee> last time I pulled it was rc5 just out :D
<Ashleee> yup
<Ashleee> tested with master
<Ashleee> without fix broken
<Ashleee> with the extra bit set to 0 it gets to kernel boot :)
<jernej> so it seems it doesn't find any issue with double rank even if it doesn't work later
<jernej> Ashlee: can you set this line to 1 and see if also size detection is correct? https://gitlab.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-sunxi/dram_sun50i_h6.c#L655
<Ashleee> let me try
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<jernej> this is actually the only (hackish) change you should need
<Ashleee> yup
<Ashleee> 4gb now
<Ashleee> ju
<Ashleee> if only I had earlyprintk in kernel enabled so I knew if it is booting or stuck
<Ashleee> no panic, just nothing past "starting kernel"
<Ashleee> it may just be systemd waiting for network though
<jernej> do you have ATF?
<Ashleee> yes
<Ashleee> wait
<Ashleee> I don't
<Ashleee> somehow got deleted on rebase to master
<jernej> anyway, do you have motivation to help find issue in rank detection code so U-Boot master could be fixed?
<jernej> s/master/upstream/
<Ashleee> motivation being that other people get it working? :)
<Ashleee> no idea how the rank detection works
<jernej> in short, rank is set to 2 at the beginning and assumption is that if it will fail to initialize, rank would be switched to 1 and tried again
<jernej> this works for lpddr3 but it seems that it doesn't for ddr3
<Ashleee> oh for crying out loud ATF! :)
<Ashleee> aarch64-linux-gnu-ld.bfd: u-boot-spl section `.rodata' will not fit in region `.sram'
<Ashleee> what can I remove?
<Ashleee> or resize .rodata?
<jernej> I'm not familiar with ATF enough...
<jernej> smaeul, apritzel ^
<Ashleee> I am off to sleep, gonna work on it tomorrow to get it to boot linux!
<Ashleee> thanks for all the help jernej :)
<Ashleee> it will not go in vain!
<jernej> np, I'll check rank detection code in the mean time
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<smaeul> jernej: that error is complaining that SPL is too big, not anything to do with ATF
<smaeul> Ashleee: you probably added too much debugging to the DRAM init code
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