rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*
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<karlp> ok... I think I just need to get the regulator tweaked. I've got https://termbin.com/imwl as an overlay, but none of those three regulators show up in /sys/class/regulator, and the gpio doesnt show upin /sys/kernel/debug/gpio so I don't think it's being "overlayed" correctly.
<karlp> without power enabled, it's kinda expected that the ov5640 driver complains about register read failures.
<karlp> but I'm not sure what I'm missing to make the overlay build those regulators?
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<wens> karlp: not all camera modules require MCLK. some use an external crystal
<wens> also , MCLK is not part of CSI. it's more of a direct output from the CCU
<wens> karlp: use dtc included with the kernel?
<wens> karlp: try having the regulators in a fragment, with the root ( / ) as the target (target = <&{/}>) ?
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<karlp> wens: great thanks for both.
<karlp> yeah, I'm more used to a plain dtc, but this armbianbuild root is... more complicated than I'mused to, and the "just add an overlay" worked out very well for the lcd touch screen, so was tryign to get it for this camera too.
<karlp> your patches for pinetab and example for some bpi model have proved very informative :)
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<TiD91> Hello, with my BPI-M1 I'm on kernel 5.8.0 with Archlinux Arm (I guess it's mainline) and u-boot from latest commit on master. Booting up works as expected, but I can't shutdown or reboot. Uart shows a kernel panic when shutting down... Any help on what to look for to fix shutdown and reboot?
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<martinayotte_> tuxd3v: the 1500000 is the maximum possible, but the default is been determine by kernel argument, such as "console=ttyS0,115200"
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<willmore> It's the base baud, i.e. the clock that supplies the serial port and is divided down to get the other baud rates.
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<mru> no, that clock is usually 24 MHz on sunxi
<mru> dividing that by 16 gives the highest bit rate of 1.5 MHz
<Ashleee> better than RPi Zero
<Ashleee> for when you are scared to route your own (LP)DDR3 :)
<Ashleee> how hard is it to route (LP)DDR3 on some small board? :)
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<mru> if you have to ask, too hard
<DuClare_> I'd like to see more chips with ram in the package
<DuClare_> Like the S3
<DuClare_> It's pretty convenient
<Ashleee> mru, I mean, everybody had to start somewhere once :)
<mru> I've never done it
<mru> I assume it's a PITA
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<jernej> Ashleee: ping
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<hexdump0815> jernej: some test update - setting al values here to zero did not help: https://gitlab.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-sunxi/dram_sun50i_h6.c#L645
<hexdump0815> jernej: and your patch does not change anything for my box - same result as without patch und the usual rank=2 - "Error while initializing DRAM PHY!"
<jernej> hexdump0815: Thanks for testing. Can you also give me values printed before this error message?
<jernej> are values printed with and without patch same?
<Ashleee> jernej, sorry cannot test today :( maybe tomorrow
<jernej> np
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<hexdump0815> jernej: sure can add the regdump back with your patch - not near the box right now, but will test later
<jernej> no, I didn't mean regdump
<jernej> ah, sorry
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<hexdump0815> what else? i think the patch itself did not print anything
<jernej> please add "#define DEBUG 1" at the very first line in the dram_sun60i_h6.c file
<jernej> it should produce some additional output
<hexdump0815> ah - ok - right - will do an rerun later
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<hexdump0815> jernej: i guess this is the output you were asking for: https://pastebin.com/raw/UZzDRcsC
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<hexdump0815> jernej: btw. i put the patches we tried back then here just in case: https://github.com/hexdump0815/u-boot-misc/tree/master/misc.h6/misc-tests
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<willmore> mru, good point, sorry to be unclear. There is a manditory /16 in the hardware of the 16550 type UART.
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<hexdump0815> jernej: maybe better ignore my last output - here is one after a full make clean and remake which i think looks more real: https://pastebin.com/raw/6XhSSXkm
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<hexdump0815> jernej: i just gave the old patch from https://github.com/hexdump0815/u-boot-misc/blob/master/misc.h6/misc-tests/test-04.patch another try from which the two armbian forum output example from january were from and i'm able to get the same behaviour: after a few minutes of resets it sometimes works
<jernej> hexdump0815: I already forgot that it worked sometimes
<jernej> anyway, to find out something new, you'll have to expand regdump from mainline to include whole range, not only PHY
<jernej> e.g. that it starts from 0x04002000
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<hexdump0815> jernej: so this one? - https://pastebin.com/raw/3V5SiinU
<hexdump0815> jernej: ah or do you mean to adjust the regdump from ashleee to that range?
<jernej> yes, second one
<hexdump0815> jernej: on it - i combine it with the test-04 patch and maybe we see a difference in the dumps between the reset case and the case when it works - would this make sense?
<jernej> not sure if it would help much
<jernej> please remove dtcr[1] write
<hexdump0815> jernej: this is interesting - i have now combined https://github.com/hexdump0815/u-boot-misc/blob/master/misc.h6/misc-tests/test-04.patch with https://freenode.irclog.whitequark.org/linux-sunxi/2020-08-09#27685489 - on that i only changed it to start at 0x04002000 and run for 4 * sizeof(struct sunxi_mctl_phy_reg) to cover the full range
<hexdump0815> jernej: and with that it works reliable each time :)
<hexdump0815> jernej: can you maybe make sense out of this? it does not print any registers though ... maybe the patch from ashleee is setting the rank to 1 combined with your test-04 patch from january make it work together?
<jernej> can you make diff between mainline and changes you have?
<hexdump0815> sure
<hexdump0815> jernej: here it is - https://pastebin.com/raw/REEtTgxf
<hexdump0815> jernej: only memory size is detected wrong - but i think Ashleee: had that problem too initially with rank=1
<hexdump0815> jernej: i tried it many times - this version works absolutely reliable for some reason ...
<jernej> I see only two potential reasons - #define DEBUG - it may delay some operations or writel(0x00010237, &mctl_phy->dtcr[1]);
<jernej> I bet on second one
<jernej> can you test which one is the reason?
<hexdump0815> sure - the write only would be test-04 patch plus rank=1 in the end - right?
<jernej> just remove lines in current sources...
<hexdump0815> without DEBUG it still works
<hexdump0815> will switch to test-04 plus rank=1 ... after making a backup of the current source :)
<jernej> If that works reliably then please test combination of test-04 and patch I made yesterday for rank detection
<hexdump0815> jernej: still working and now even the memory size is correct :) - output and current diff: https://pastebin.com/raw/FzZtfjZ7
<jernej> great!
<jernej> now the only question remains how to fix rank detection
<jernej> hopefully patch from yesterday will help with that
<hexdump0815> shall i add it on top?
<jernej> revert rank change
<jernej> and add it on top of test-04
<jernej> DRAM driver must always start with rank=2
<jernej> it tests if that works or not. If not, it changes to rank=1
<jernej> hexdump0815: to avoid misunderstanding, here is the patch: http://ix.io/2tVW
<jernej> it would be great if that works on top of clean mainline
<hexdump0815> jernej: looks like rank detection does not work - i reverted rank back to 2 and added your patch from two days ago
<hexdump0815> DRAM:Error while initializing DRAM PHY!
<jernej> ok then, thanks for testing
<jernej> I'll look into rank detection code again
<hexdump0815> my diff is matching yours exactly
<jernej> but at least now you have workaround :)
<hexdump0815> thank you for getting this forward ... time to go to bed for today :)
<jernej> me too
<hexdump0815> do you have a plan how to integrate test-04.patch into regular mainline or is it ok for the normal case as well as it is?
<jernej> not sure what you mean
<hexdump0815> for my box i still need that test-04 hack - can that go as it is into the u-boot tree or is it just a specific hack?
<jernej> it should go to mainline but it needs to be double checked
<jernej> some changes may not be needed
<hexdump0815> cool - let me know when you have some new rank detection code to test tomorrow or another day
<jernej> for example, tcke should probably stay as it is already in mainline
<jernej> I'm not certain about trrd and txp
<hexdump0815> ok - we can reduce it further step by step and see when it breaks ... its always easier to debug from the working end :)
<jernej> exactly
<jernej> anyway, if you have time, try to figure which changes are needed from test-04 patch and which are not
<hexdump0815> i can try during the next days - tomorrow most probably not
<jernej> no hurry :)
<jernej> just ping me when you'll have result
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