* whitequark
← can't be arsed to convert ' to " by hand, and regexps don't cut it
<cr1901_modern>
sb0: Is Migen only compatible with certain Xilinx FPGAs? I've set up my new platform in Migen- just enough to get simple target to compile, and the Verilog compiler errors out depending on what FPGA I choose.
<cr1901_modern>
(I chose the "correct" FPGA first, got an error, and then replaced it with another Spartan-6 FPGA from a different board, which succeeded)
<cr1901_modern>
Nevermind for now- I didn't do everything required to add my FPGA (Spartan-3 variant)
<sb0>
whitequark, nice :)
<sb0>
cr1901_modern, no, it works on altera and lattice as well, and someone is making an asic even
<sb0>
cr1901_modern, it would help if you let us know what error you got
<cr1901_modern>
ERROR:HDLCompilers:26 - "F:/Projects/misoc/extcores/lm32/lm32_config.v" line 186 expecting 'EOF', found 'function'
<sb0>
ah, that's a lm32 problem, not a migen problem
<cr1901_modern>
indeed, line 186 has a function, but why is it complaining for one FPGA but not another?
<sb0>
that's a known xst problem
<sb0>
functions only work when targeting certain fpgas. go complain to xilinx ;)
<sb0>
migen itself never uses function
<cr1901_modern>
I don't think that's going to make any difference, since Xilinx is phasing out webpack
<cr1901_modern>
but my mistake :P
<sb0>
there's a flag in the lm32 settings to replace the function i think
<mindrunner>
this uart drives me nuts!!! :/ Is there anybody out there gatting a reliable connection between computer and pipistrello with more than 230400baud?
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<travis-ci>
mithro/migen#34 (atlys-platform - 66dcaff : Tim 'mithro' Ansell): The build passed.
<whitequark>
sb0: imagine a coverage tool for code running on LM32, that could show you condition coverage
<GitHub126>
[misoc] enjoy-digital pushed 1 new commit to master: http://git.io/vfzh3
<GitHub126>
misoc/master 2d56d32 Florent Kermarrec: liteeth/mac/core: simplify and fix padding
<sb0_>
I'm in the hk hackerspace right now and people are using it to conduct the most boring corporate job interviews T_T
<sb0_>
"Do you have an iphone?"
<sb0_>
lol!
<sb0_>
they can get 85% off their vacuum gear here and all they think about is this sort of bland stuff
<sb0_>
whitequark, how would that work? the compiler would insert "mark this code block as reached" statements?
<whitequark>
yea
<whitequark>
usually you get a report with discreteness of a line
<whitequark>
which is not actually useful if you think about it
<whitequark>
pathetically few tools can do condition coverage ("did all parts of the boolean expr become true/false" / maybe even "did all possible combinations happen")
<whitequark>
in cases where this is overkill for testing, you might still want to do something like path tracing
<sb0_>
pathetically plenty of people still use C for a lot of things
<sb0_>
;)
<whitequark>
well, you can do that in C
<whitequark>
that's how sqlite is tested
<whitequark>
but they have their proprietary testsuite or something
<sb0_>
how does that work? C parser -> AST modification -> unparser -> gcc?
<whitequark>
probably
<sb0_>
or did they make a clang plugin or something?
<whitequark>
it predates clang
<whitequark>
today yeah, a clang plugin or more likely patch
<whitequark>
you don't strictly speaking need an unparser. you can just rewrite the source carefully
<whitequark>
like i do
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<kyak>
most tools instrument source code itself. Some are capable to instrument assembly code (depending on why you are doing coverage analysis)
<kyak>
condition coverage is considered a weaker metric than, say, MC/DC coverage
<kyak>
most proprietary tools that do coverage analysis also support MC/DC
<GitHub20>
[misoc] enjoy-digital pushed 2 new commits to master: http://git.io/vfgWs
<GitHub105>
[migen] enjoy-digital pushed 1 new commit to master: http://git.io/vfg94
<GitHub105>
migen/master 67702f2 Florent Kermarrec: migen/fhdl/verilog: _printheader/_printcomb, remove default value of arguments which are not used in internal functions. (thanks sb)
<GitHub138>
[pyparser] whitequark pushed 4 new commits to master: http://git.io/vfg92
<mindrunner>
can i easily use the pipistrello's usb_fifo with the liteusb/ft2232h phy module? does it behave like an ftdi device on the io pins? what happens to the serial port then? also, isnt it generally better to use the seial io device of the board via io pins, instead of the ftdi wired serial?
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<_florent_>
hi mindrunner: for now it's not possible to use the ft2232h phy since it uses synchronous mode and the pipistrello is wired in asynchronous mode
<_florent_>
I want to work on that for the minispartan6
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<mindrunner>
_florent_, thanks
<mindrunner>
so there is nothing available yet to use the usb_fifo?
<mindrunner>
is there any examples on how to create a second serial port?
<_florent_>
for the usb fifo: not in misoc for the asynchronous mode, don't know why they used this mode???
<mindrunner>
i created another UARTPHY device and UART, like it is done in basesoc, passed the io pins as pads and created another interrups as well as CSR
<sb0>
it looks like something for a small microcontroller or so
<cr1901_modern>
sb0: Re: embedded TCP/IP, don't you find it at least interesting that certain CPUs have anachronistically been given Internet access (6502/Z80)? :P
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