sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<whitequark> found a bug in python. again
<whitequark> this time in latest 3.x
<cr1901_modern> It's like g decided to eat x and erase it from existence o.0;
<sb0> rjo, the new "runnable" flag in the priority key is there only to fix this problem you are describing
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<rjo> sb0: ack
<rjo> sb0: why can a Run have due_date=None?
<sb0> it means "run as soon as possible, in submission order, if there are no overdue runs"
<sb0> most non-calibration runs will have due_date=None, I believe
<rjo> basically due_date=None is equivalent to due_date=now() dynamically
<rjo> None=now() "by reference"
<rjo> ack
<GitHub137> [pythonparser] whitequark pushed 2 new commits to master: http://git.io/vk8Ry
<GitHub137> pythonparser/master f1ae99a whitequark: Documentation fix.
<GitHub137> pythonparser/master 57f3b67 whitequark: Move the type sniffing logic to {Visitor,Transformer}.visit.
<GitHub28> [pythonparser] whitequark pushed 1 new commit to master: http://git.io/vk8gQ
<GitHub28> pythonparser/master d08d510 whitequark: Add pythonparser.parse_buffer.
<whitequark> hm, not a bug apparently https://bugs.python.org/issue24321#msg244357
<cr1901_modern> "Exceptions are cleared because with the traceback attached to them, they form a reference cycle with the stack frame" <= No doubt b/c I know little about Pythons internals, but I wonder why that's the case
<whitequark> short answer: python internals are gross and python doesn't strive to get either a clean spec or a clean impl all that much
<whitequark> I am not sure if it /has/ a single coherent spec, much less formal semantics
<whitequark> (no, docs plus a bunch of PEPs don't count)
<sb0> so if you store the exception after catching it in a except clause, do bad things happen?
<cr1901_modern> Interesting you should mention the parentheses, b/c I can't recall seeing anything about semantics either aside from tidbits like the above in the docs
<whitequark> sb0: what I gather is that you need a full mark/sweep cycle to collect it
<whitequark> as opposed to just refcounting doing that
<whitequark> i.e. it is a crude performance hack that only ever matters for cpython that leaked into language semantics
<whitequark> see above.
<cr1901_modern> If Python was refcounting, wouldn't the end of the exception just decrease the refcount, and the variable would live until you got to the end of f()?
<whitequark> exceptions keep a reference to the frame
<whitequark> i.e. function stack frame
<cr1901_modern> Ahhh, I see (I think). the exception would have access to everything then, so in your case, it assigns "x" to the exception object, then deletes it at the end of the exception. >>
<cr1901_modern> Which thereby destroys the variable you had before the exception?
<whitequark> except clause, yes
<whitequark> yes
<cr1901_modern> Yea, that seems like a mess/shouldn't be by design o.0;
<whitequark> I'm not even sure why would you raise so many times that it will matter
<whitequark> my crystal ball says that this is a remnant from the time when python didn't have a tracing GC
<whitequark> though it is still beyond me why it's in 3k
<cr1901_modern> I'm not even sure what optimizations this behavior allows, tbh.
<whitequark> one tracing GC cycle less
<cr1901_modern> I'll make a memo of that and look up what a tracing GC does later. But what about pre-tracing GC (as your crystal ball predicts it's a remnant from the dark ages)?
<whitequark> avoids a leak
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<GitHub58> [artiq] whitequark pushed 2 new commits to new-py2llvm: http://git.io/vk8pX
<GitHub58> artiq/new-py2llvm 74080f2 whitequark: Update .gitignore.
<GitHub58> artiq/new-py2llvm abbc87e whitequark: Add new type inferencer.
<GitHub149> [pythonparser] whitequark pushed 1 new commit to master: http://git.io/vk8jI
<GitHub149> pythonparser/master 15ad1e8 whitequark: Include render of notes in Diagnostic.render output.
<GitHub190> [artiq] whitequark pushed 1 new commit to new-py2llvm: http://git.io/vk8jB
<GitHub190> artiq/new-py2llvm 56d1a9b whitequark: Shorten the unification error message when too redundant.
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<travis-ci> m-labs/artiq#167 (new-py2llvm - abbc87e : whitequark): The build is still failing.
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<travis-ci> m-labs/artiq#168 (new-py2llvm - 56d1a9b : whitequark): The build is still failing.
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<GitHub167> [artiq] fallen pushed 2 new commits to master: http://git.io/vk42W
<GitHub167> artiq/master 575dfad Yann Sionneau: flash_storage comm: use OK/ERROR replies instead of specific FLASH_WRITE_REPLY
<GitHub167> artiq/master ed95038 Yann Sionneau: flash_storage: remove useless parentheses
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<travis-ci> m-labs/artiq#169 (master - ed95038 : Yann Sionneau): The build passed.
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<GitHub36> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/vk4br
<GitHub36> misoc/master f40140d Florent Kermarrec: sdram: refactor minicon and fix issues with DDRx memories...
<cr1901_modern> Yay, got my dev board. Now I can try adding MiSoC support to it! :3
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<GitHub154> [artiq] sbourdeauducq pushed 2 new commits to master: http://git.io/vkBRf
<GitHub154> artiq/master 048782e Sebastien Bourdeauducq: test/scheduler: test flush
<GitHub154> artiq/master 6ff2e1a Sebastien Bourdeauducq: test/scheduler: verify that a high priority timed experiment in the future is not run
<key2> is there a simple example of how does one use an external verilog module with migen ?
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<travis-ci> m-labs/artiq#170 (master - 048782e : Sebastien Bourdeauducq): The build passed.
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<ysionneau> this instances the mxcrg module, which is in the following verilog file: https://github.com/m-labs/misoc/blob/master/misoclib/others/mxcrg.v
<key2> thx, lookin
<key2> and icarus would understand this source ?
<key2> like simulation is done properly ?
<ysionneau> icarus would understand what?
<key2> i mean, if i use an external verilog source, i can still simulate properly, right ?
<key2> as it's passed to icarus through the VPI at simulation time
* ysionneau never tried that
<ysionneau> key2: I just tried a simple example, it seems to work fine, you just need to add your extra verilog files when instanciating the icarus.Runner : icarus.Runner(extra_files=["your_verilog.v"])
<ysionneau> and now I remember I already did that obviously, when simulating the memory controller (in migen) connected to a Micron DRAM model (in plain verilog)
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<sb0> ubuntu is such a piece of crap. trying to upgrade: 1) fontconfig breaks and apt-get stops configuring packages and refuses to install anything after that until i had to use dpkg manually to upgrade the package that broke fontconfig 2) upgrading gnome deinstalled systemd
<sb0> after fixing those, gdm doesn't start anymore for some reason
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<GitHub27> [artiq] fallen pushed 1 new commit to master: http://git.io/vkRdS
<GitHub27> artiq/master 7ec0bc0 Yann Sionneau: manual: explain how to compile and flash the idle kernel
<GitHub175> [artiq] fallen pushed 2 new commits to master: http://git.io/vkRNQ
<GitHub175> artiq/master d5fb50b Yann Sionneau: manual: after artiq is installed, frontends can be used without path prefix...
<GitHub175> artiq/master a84f76b Yann Sionneau: manual: cleanup, removing Gtk GUI related instructions
<sb0> ysionneau, you still have a ~/artiq-dev/artiq/frontend/artiq_flash.sh
<ysionneau> yep, but with setup.py I didn't find a mean to install non-python frontends
<ysionneau> with conda it works IIRC
<ysionneau> but since the manual installs artiq using setup.py, I left the prefix path
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<travis-ci> m-labs/artiq#171 (master - 7ec0bc0 : Yann Sionneau): The build passed.
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<ysionneau> that is repair ...
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<travis-ci> m-labs/artiq#172 (master - a84f76b : Yann Sionneau): The build passed.
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<sb0> whoa, now gdm keeps running and killing the x server, and will never stop
<sb0> i love this sort of high-quality software
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<cr1901_modern> I loathe how gnome depends on systemd
<larsc> and libc! how do they even dare
<cr1901_modern> libc is portable. systemd is not, and will never be.
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<whitequark> it's not like libc is any good either