02:28 <sb0> MiW, i suspect the eMMC bug could be temperature-dependent. if you want to help, you can collect hard data on it, e.g. compile the linux kernel 10x while cooling the tablet to a few C

02:29 <sb0> and see if it crashes...

02:38 <sb0> ysionneau, again, the max frequency is 146MHz not 125

03:06 <sb0> ysionneau, you can look at the DDR3 PHY for a high speed bidirectional SERDES example

07:55 <key2> hi

07:56 <key2> sb0: what are the consequances of not having a llvm support for the lm32 ?

07:56 <key2> for compiling an OS, gcc isn't enough ?

08:20 <ysionneau> key2: you don't need llvm (or clang) to compile an OS. You can do it with gcc

08:21 <key2> yeah that was my opinion

08:21 <ysionneau> llvm is useful to create a compiler

08:21 <key2> sb0 was telling me that the problem of lm32 is that we have a reduced llvm support

08:21 <key2> i was trying to understand the consequances

08:22 <ysionneau> lm32 generally has poor software support

08:22 <key2> but concidering that I could cross compile.. then am good to go right ?

08:23 <key2> I planned to port nuttx on it

08:23 <ysionneau> the thing is, I don't have any clue about what you intend to do

08:23 <ysionneau> you I can't say "you're good"

08:23 <ysionneau> but for porting nuttx, you are good with a gcc cross-compilation toolchain, yes

08:24 <key2> my finaly goal would be to have a nuttx up and running with misoc, with Ethernet and USB drivers

08:25 <key2> also, I dunno if anyone here is interested in wings board for pipistrello / papillo pro with Ethernet PHY and USB Phy

08:59 <ysionneau> 04:38 < sb0> ysionneau, again, the max frequency is 146MHz not 125 < 146*4 -> 584 MHz, should still work

08:59 <ysionneau> 05:06 < sb0> ysionneau, you can look at the DDR3 PHY for a high speed bidirectional SERDES example < yep!

10:17 <GitHub149> [misoc] enjoy-digital pushed 2 new commits to master: http://git.io/vIKlO

10:17 <GitHub149> misoc/master 571ce57 Florent Kermarrec: litesata/phy/k7: apply AR# 63869 to keep CDR in hold during SATA link initialization...

10:17 <GitHub149> misoc/master a1f7ecc Florent Kermarrec: litesata: use 200MHz clock and SATA3 (6.0Gb/s) on all example designs: working :)

16:17 <sb0> _florent_, good job on the sata3 :)

16:18 <sb0> _florent_, btw, the litepcie driver doesn't support sgdma, right?

16:18 <sb0> it only supports DMAing those buffers preallocated in the kernel

21:58 <_florent_> sb0: about litepcie, yes for now sgdma descriptors are programmed in the kernel module:

21:59 <_florent_> https://github.com/m-labs/misoc/blob/master/misoclib/com/litepcie/software/linux/kernel/main.c#L206

21:59 <_florent_> we are always looping on the same list of buffers

22:11 <ysionneau> I wonder why there is speed grade -2 in pipistrello platform file, mine is -3N (and the pipistrello website advertises speed grade -3), is there a reason for this -2?

22:11 <ysionneau> https://github.com/m-labs/migen/blob/master/mibuild/platforms/pipistrello.py#L133

22:13 <ysionneau> (err mine is -3, not -3N)

22:18 <cr1901_modern> I like how Xilinx is eating my inout ports and removing them from my design when I put them into a generate loop...

22:18 <cr1901_modern> ISE*