sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<nic30>
Hello, i have problem with migen, i would like to create handshake interface and i basic examples it works but when i try something more complicated migen puts reg at component outputs. Is there way to force migen to use multiplexor output rather than output with reg ?
<nic30>
from migen.fhdl.std import * from migen.fhdl.specials import SynthesisDirective from migen.fhdl import verilog from migen.genlib.cdc import * from migen.genlib.record import * from migen.sim.generic import run_simulation
<nic30>
# i will copy rather line by line....
<nic30>
from migen.fhdl.std import *
<nic30>
from migen.fhdl.specials import SynthesisDirective
<nic30>
from migen.fhdl import verilog
<nic30>
from migen.genlib.cdc import *
<nic30>
from migen.genlib.record import *
<nic30>
from migen.sim.generic import run_simulation
<nic30>
my problem is that slave_valid and master_ready have reg, i need them to by just combinational. What iam doing wrong?
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<GitHub161>
[artiq] whitequark pushed 1 new commit to new-py2llvm: http://git.io/vtnsp
<GitHub161>
artiq/new-py2llvm 7cd6011 whitequark: Add typechecking for most builtin.
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<GitHub122>
[misoc] sbourdeauducq pushed 1 new commit to master: http://git.io/vtnMp
<GitHub122>
misoc/master a1e3fb1 Joe Britton: flterm.py: use serial_for_url
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<sb0>
hi cr1901_modern
<sb0>
did you get my last email about your patch?
<cr1901_modern>
sb0: I haven't had power for the past 3 days, so I haven't read it
* cr1901_modern
doesn't have smart devices and a shitty national electric grid
<sb0>
what country is that?
<cr1901_modern>
Good ol' USA, New Jersey specifically
<sb0>
lol
<cr1901_modern>
New Jersey got hit with a storm that took out 200,000+ resident's power on Tuesday (for perspective, this is more homes without than the last hurricane to reach land). I was one of them.
<cr1901_modern>
In any case, I read your email. I ran the source file through an online PEP checker, which apparently sucks, since you still had issues with it.
<sb0>
ime flake8 works pretty well and isn't a pain to install
<cr1901_modern>
Will fix. In the meantime, this whole experience makes me realize I take power for granted. Need to find a way to generate my own power. At least enough to power a small fridge :/
<sb0>
rjo, I cannot flash any of the pipistrello boards with xc3sprog. have you used other tools successfully?
<sb0>
ah, it works with fpgaprog
<sb0>
xc3sprog is remarkably buggy ...
<sb0>
blergh, and you cannot flash an arbitrary binary with fpgaprog without flashing the main bitstream as well
<sb0>
also, they _had_ to use a different communication protocol with the proxy bitstream, of course
<sb0>
why makes things simple
<sb0>
*make
<sb0>
next in today's lovely bugs: accessing the pipistrello sdram too fast makes my laptop drop the USB power
<sb0>
(╯°□°)╯︵ ┻━┻)
<GitHub51>
[artiq] whitequark pushed 2 new commits to new-py2llvm: http://git.io/vtWg2
<GitHub51>
artiq/new-py2llvm 71256a7 whitequark: Assignment rhs is typed before lhs.
<GitHub51>
artiq/new-py2llvm e07057c whitequark: Add range types.
<GitHub181>
[artiq] whitequark pushed 1 new commit to new-py2llvm: http://git.io/vtWVR
<GitHub181>
artiq/new-py2llvm ea0d11b whitequark: Allow also passing iterables to lists.
<GitHub123>
[artiq] fallen pushed 1 new commit to master: http://git.io/vtW6s
<GitHub123>
artiq/master c381102 Yann Sionneau: manual: fix faq item title about determining pyserial URL by serial number
<ysionneau>
rjo: (artiq_flash) set -v seems very very verbose :o
<ysionneau>
maybe you meant set -x
<ysionneau>
?
<ysionneau>
this kind of feature seems to output way too much, I fear it can get the user lost
<whitequark>
ha, nist finally retracted Dual_EC_DRBG
<rjo>
sb0: yeah. my jtag-spi-proxy works with two tools, there are some comments in the code.
<rjo>
sb0: xc3sprog and pipistrello works fine here. it is entirely possible that my jtag-spi-proxy does not re-implement all the bugs that xc3sprog relies on.
<rjo>
;)
<rjo>
ysionneau: ack. i will make it set -x
<rjo>
ysionneau: i was getting annoyed by the fact that if xc3sprog fails to find the bitstream/proxy/bitstream it simply exits cleanly.
<rjo>
ysionneau: the verbosity is similar for -x and -v just that one has pluses.
<GitHub101>
[artiq] jordens pushed 1 new commit to master: http://git.io/vtWp3
<GitHub101>
artiq/master 07ceed9 Robert Jordens: artiq_flash.sh: back down on verbosity
<ysionneau>
rjo: -x only prints lines which are executed
<ysionneau>
-v prints everything afaik
<ysionneau>
but yes -x is also very verbose :/
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<ysionneau>
maybe I can add an error message for the situation you reported
<rjo>
ysionneau: imho fixing at least that case in xc3sprog would be nice.
<ysionneau>
"in xc3sprog" ?
<ysionneau>
can't I just do if [ -f ] to test for file existence in the shell script?
<ysionneau>
proxy existence is already tested btw, and should print an error message in case file does not exist
<rjo>
yes. but that does not solve the bug in xc3sprog that it should not exit cleanly if it fails.
<rjo>
it is actually more and fragile code in artiq_flash.sh than in xc3sprog.
<ysionneau>
sure, xc3sprog has many defects
<ysionneau>
but it's easier for us to patch our own code, than patching an external tool
<rjo>
xc3sprog seems to be accepting patches afaict. it seems cleaner to fix bugs in code than to work around them. even if the code is broken in other places.
<rjo>
sb0: i would like to make experiments have "from artiq.language import *" instead of "from artiq ...". with the later it is not clear that the "*" are exclusively language elements used to write experiments and not things like worker/master/ui etc.
<sb0>
rjo, does the runtime boot on your pipistrello?
<sb0>
it crashes at startup here, but that could be related to the USB power issues