01:03 <whitequark> you know, the Lattice docs for their FPGAs are... well, they're bad, of course, but they're *way* better than Xilinx

01:04 <whitequark> Xilinx does this thing where they put in a lot of words that sort of describe how things work but not enough to actually produce a working system

01:49 <_whitenotifier-3> [nmigen] whitequark opened issue #167: Use synchronous global reset release on ECP5 - https://git.io/fjHMo

01:56 <_whitenotifier-3> [nmigen] cr1901 opened pull request #168: test.test_examples: Convert pathlib-specific class to string. - https://git.io/fjHMD

01:58 <_whitenotifier-3> [nmigen] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/m-labs/nmigen/builds/567685590?utm_source=github_status&utm_medium=notification

01:59 <cr1901_modern> the hell?

02:00 <sb0> hmm, i'd say it depends on which xilinx doc you are looking at

02:00 <whitequark> yes. there are good ones.

02:00 <whitequark> but e.g. the doc i was reading describing the configuration interface is worthless

02:00 <whitequark> reading iMPACT files + BSDL files was more informative

02:04 <_whitenotifier-3> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/567685590?utm_source=github_status&utm_medium=notification

02:04 <_whitenotifier-3> [nmigen] codecov[bot] commented on pull request #168: test.test_examples: Convert pathlib-specific class to string. - https://git.io/fjHMN

02:04 <_whitenotifier-3> [nmigen] Success. 80.46% remains the same compared to 434b686 - https://codecov.io/gh/m-labs/nmigen/compare/434b686d5e6ab397578340bfcc8ae6e9e8020ac4...8909835f17e443eb5b81fc20467547b1d1f8da05

02:04 <_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing 434b686...8909835 - https://codecov.io/gh/m-labs/nmigen/compare/434b686d5e6ab397578340bfcc8ae6e9e8020ac4...8909835f17e443eb5b81fc20467547b1d1f8da05

04:27 <mtrbot-ml> [mattermost] <sb10q> @astro zc706 master does not compile due to rust syntax errors, please fix them

06:02 <TD-Linux> whitequark, ohhhhh I think that sim-synth mismatch with switches might be the one that affected me too

06:02 <TD-Linux> I have a similar structure but with FSMs, but I think those generate a switch

06:02 <TD-Linux> I'll rebase and test on wed when I have access to the hw again

06:12 <mtrbot-ml> [mattermost] <sb10q> @hartytp I got a chinese ST-Link clone, but the thermostat board is having none of it

06:13 <mtrbot-ml> [mattermost] <sb10q> Info : Target voltage: 3.282651

06:13 <mtrbot-ml> [mattermost] <sb10q> Error: init mode failed (unable to connect to the target)

06:13 <mtrbot-ml> [mattermost] <sb10q> the same probe works correctly on ionpak, so it's really beginning to look like there is something wrong with the thermostat board you sent

06:26 <mtrbot-ml> [mattermost] <sb10q> it also works correctly on stabilizer

06:26 <mtrbot-ml> [mattermost] <sb10q> @hartytp can you send another thermostat?

10:18 <rjo> sb0: i can hook up the one i have here on tuesday or wednesday.

12:13 <_whitenotifier-3> [nmigen] zignig opened issue #169: Platform default clock - https://git.io/fjHdE

13:34 <_whitenotifier-3> [nmigen] whitequark commented on issue #169: Platform default clock - https://git.io/fjHb4

14:31 <_whitenotifier-3> [nmigen] whitequark commented on issue #167: Use synchronous global reset release on ECP5 - https://git.io/fjHNi

17:29 <mtrbot-ml> [mattermost] <sb10q> @astro what's using bcmp?