02:38 <mtrbot-ml> [mattermost] <sb10q> @astro the DNS entry for zc706 is 192.168.1.51

12:19 <mtrbot-ml> [mattermost] <pathfinder49> @ astro Here is my repo: https://github.com/pathfinder49/ionpak-thermostat

12:20 <mtrbot-ml> [mattermost] <pathfinder49> @astro Here is my repo: https://github.com/pathfinder49/ionpak-thermostat

13:43 <_whitenotifier-f> [nmigen] Fatsie opened pull request #268: class Memory: allow to set default `simulate` value for all generated memory blocks. - https://git.io/JewDT

13:53 <_whitenotifier-f> [nmigen] Fatsie opened pull request #269: Platform.add_file(): Allow to add same file with same content multiple times. - https://git.io/JewD4

13:58 <_whitenotifier-f> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/610865766?utm_source=github_status&utm_medium=notification

13:58 <_whitenotifier-f> [nmigen] codecov[bot] commented on pull request #268: class Memory: allow to set default `simulate` value for all generated memory blocks. - https://git.io/JewDP

13:58 <_whitenotifier-f> [nmigen] Success. 82.16% (+0.08%) compared to f8f7d83 - https://codecov.io/gh/m-labs/nmigen/compare/f8f7d8312773a852c6d6d91f99d8147add131d55...40884c92aac84c9e102c2926a1abb19c981dda61

13:58 <_whitenotifier-f> [nmigen] Failure. 75% of diff hit (target 82.07%) - https://codecov.io/gh/m-labs/nmigen/compare/f8f7d8312773a852c6d6d91f99d8147add131d55...40884c92aac84c9e102c2926a1abb19c981dda61

13:59 <_whitenotifier-f> [nmigen] Failure. 82.07% (-0.01%) compared to f8f7d83 - https://codecov.io/gh/m-labs/nmigen/compare/f8f7d8312773a852c6d6d91f99d8147add131d55...40884c92aac84c9e102c2926a1abb19c981dda61

13:59 <_whitenotifier-f> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/610865766?utm_source=github_status&utm_medium=notification

14:09 <_whitenotifier-f> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/610869762?utm_source=github_status&utm_medium=notification

14:09 <_whitenotifier-f> [nmigen] codecov[bot] commented on pull request #269: Platform.add_file(): Allow to add same file with same content multiple times. - https://git.io/JewDp

14:09 <_whitenotifier-f> [nmigen] Success. 82.15% (+0.07%) compared to f8f7d83 - https://codecov.io/gh/m-labs/nmigen/compare/f8f7d8312773a852c6d6d91f99d8147add131d55...3fb8af86f8674c0e99c2abfea423ee3ffbf2900d

14:09 <_whitenotifier-f> [nmigen] Failure. 0% of diff hit (target 82.07%) - https://codecov.io/gh/m-labs/nmigen/compare/f8f7d8312773a852c6d6d91f99d8147add131d55...3fb8af86f8674c0e99c2abfea423ee3ffbf2900d

14:13 <_whitenotifier-f> [nmigen] Failure. 82.06% (-0.02%) compared to f8f7d83 - https://codecov.io/gh/m-labs/nmigen/compare/f8f7d8312773a852c6d6d91f99d8147add131d55...3fb8af86f8674c0e99c2abfea423ee3ffbf2900d

14:13 <_whitenotifier-f> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/610869762?utm_source=github_status&utm_medium=notification

20:36 <ZirconiumX> whitequark: Something I noticed in my nMigen experiments. If module B instantiates module A (say) 16 times, then the output Verilog will have A, A$1, A$2, A$3, ... when A itself hasn't changed. Thinking about it, it's probably because nMigen can't detect if Python metaprogramming has occurred, but the duplication does bloat the output file.

20:41 <ZirconiumX> And something else as a thought: an initialised ROM cell; while Memory() is good, Quartus struggles to parse ROM init in an `initial begin` block, instead preferring the ROM init to be in a separate file. I don't know how this translates to other vendors however.