sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
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<mtrbot-ml> [mattermost] <sb10q> @rjo do you want to add 10MHz support to artiq-5 or disable Innsbruck2 builds for -5?
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<rjo> Let's backport it.
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<rjo> sb0: thanks. i was wondering why git refused to cherry-pick that commit before noticing you already did it.
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<mtrbot-ml> [mattermost] <sb10q> the si549 on sayma seem to respond to i2c addresses (8-bit) 170, 171, 172 and 173
<mtrbot-ml> [mattermost] <sb10q> is that what it's supposed to be?
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<mtrbot-ml> [mattermost] <sb10q> same response on both i2c buses
<mtrbot-ml> [mattermost] <sb10q> part number lookup on the other hand yields nothing
<mtrbot-ml> [mattermost] <sb10q> it says "si549cbac00172" on the package...
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<mtrbot-ml> [mattermost] <hartytp> Si549
<mtrbot-ml> [mattermost] <hartytp> CMOS
<mtrbot-ml> [mattermost] <sb10q> @hartytp Table 5.6. Si549 Register Write Sequence to Set Output Frequency says "write 0x00 to register 69"
<mtrbot-ml> [mattermost] <hartytp> 10ppm stability
<mtrbot-ml> [mattermost] <hartytp> OE is pin 1 active high
<mtrbot-ml> [mattermost] <hartytp> 0.2-325MHz
<mtrbot-ml> [mattermost] <sb10q> table "5.7 Register Map Reference" says bit 0 of register 69 is reserved and should be 1
<mtrbot-ml> [mattermost] <hartytp> the rest is the startup frequency
<mtrbot-ml> [mattermost] <sb10q> what is the correct value to write in the table 5.6 sequence? 0x00 or 0x01?
<mtrbot-ml> [mattermost] <hartytp> and a user-defined I2C address
<mtrbot-ml> [mattermost] <sb10q> yeah everything says "user defined" without much more info...
<mtrbot-ml> [mattermost] <hartytp> yes, I don't see much obvious way of figuring out what to expect apart
<mtrbot-ml> [mattermost] <hartytp> forum?
<mtrbot-ml> [mattermost] <sb10q> brute-forcing the i2c addresses suggests 170
<mtrbot-ml> [mattermost] <sb10q> annoying crap...
<mtrbot-ml> [mattermost] <hartytp> can always ask them since it's not in the docs anywhere I can see
<mtrbot-ml> [mattermost] <hartytp> which bit of the sequence are you asking about?
<mtrbot-ml> [mattermost] <hartytp> Best to ask @weidazhang as he wrote the POC code
<mtrbot-ml> [mattermost] <sb10q> register 69, disable FCAL override
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<_whitenotifier-e> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/JeX2E
<_whitenotifier-e> [m-labs/nmigen] whitequark f8428ff - back.rtlil: infer bit width for instance parameters.
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<_whitenotifier-e> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/617840158?utm_source=github_status&utm_medium=notification
<_whitenotifier-e> [nmigen] Success. 82.39% (+0.06%) compared to 56bb42a - https://codecov.io/gh/m-labs/nmigen/commit/f8428ff5051c2c7295e93a0a191880076b5dffab
<_whitenotifier-e> [nmigen] Success. 100% of diff hit (target 82.33%) - https://codecov.io/gh/m-labs/nmigen/commit/f8428ff5051c2c7295e93a0a191880076b5dffab
<_whitenotifier-e> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/617840158?utm_source=github_status&utm_medium=notification
<_whitenotifier-e> [nmigen] Success. 82.33% (+0%) compared to 56bb42a - https://codecov.io/gh/m-labs/nmigen/commit/f8428ff5051c2c7295e93a0a191880076b5dffab
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