06:49 <mtrbot-ml> [mattermost] <sb10q> meh, guess I'll just stick some solid-state relays on a STM32 board

11:27 <_whitenotifier-e> [nmigen] whitequark commented on issue #228: Reconsider simulator interface - https://git.io/JeP7S

12:32 <whitequark> sb: rjo: do you know anything about GTH/GTX offset scan mode?

12:33 <whitequark> is the offset sampler an entirely hardware feature that is a part of the transceiver?

13:13 <rjo> The Eye Scan? That's really nice and useful. Mostly front end hardware

13:18 <rjo> A delay and a bias

13:22 <whitequark> yeah, eye scan

13:22 <whitequark> I was looking if ECP5 can be tricked into doing that

13:22 <whitequark> looks like no

14:40 <rjo> i'm doing the temporal part on a ice40. the bias would need special hardware. could be done with a simple sigma/pwm dac on each diff pair.

14:42 <rjo> *one dac on one side of the pair may suffice for a dirty attempt

14:45 <whitequark> temporal?

14:47 <rjo> the delay. that can be done as a phase shift of the pll.

14:47 <whitequark> hm. what bitrate are you looking at?

14:48 <rjo> that's just 500 Mb/s very much limited by what the ice40 can do.

14:49 <rjo> but bitrate doesn't matter for the technique

14:51 <whitequark> the issue with the ECP5 SERDES is that i think you can't add a phase offset.

14:55 <whitequark> you can actually sample the RX values but... it bypasses equalizer, it's a DC-coupled buffer, and it works at 250 Mbps at most

14:55 <whitequark> it's basically the boundary scan buffer that's exposed to the fabric as an option, for various out-of-band signals

18:28 <_whitenotifier-e> [nmigen] povauboin opened issue #274: Signal that is used as both an input and output to an Instance gets assigned to its reset value - https://git.io/JeXvC

18:47 <_whitenotifier-e> [nmigen] whitequark commented on issue #274: Signal that is used as both an input and output to an Instance gets assigned to its reset value - https://git.io/JeXvx

19:35 <ZirconiumX> whitequark: I'm going to need to write a test suite for my nMigen code, and your tweets about pysim2 make me wonder if I should wait for that, use pysim[1] and accept the speed cost, or try cocotb.

19:38 <whitequark> use pysim imo

19:38 <whitequark> pysim2 is approx 4 times faster

19:38 <whitequark> after pysim2 there'll be cxxsim, which should be in the same order of magnitude as verilator, and with the same interface

19:38 <whitequark> but first I need to solve some interesting research problems

19:42 <ZirconiumX> Right, okay, thank you

21:20 <_whitenotifier-e> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±2] https://git.io/JeXI0

21:20 <_whitenotifier-e> [m-labs/nmigen] whitequark 56bb42a - hdl.ir: for instance ports, prioritize defs over uses.

21:20 <_whitenotifier-e> [nmigen] whitequark closed issue #274: Signal that is used as both an input and output to an Instance gets assigned to its reset value - https://git.io/JeXvC

21:23 <Junki> Hi, I have a question about flashing CPLD of urukul with The Digilent JTAG-HS2. I read a note on urukul github that it was working and bought one to flash our urukul, but it just keeps failing to write urukul.jed file.

21:39 <_whitenotifier-e> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/617421487?utm_source=github_status&utm_medium=notification

21:39 <_whitenotifier-e> [nmigen] Success. 82.33% (+0.01%) compared to f207f3f - https://codecov.io/gh/m-labs/nmigen/commit/56bb42aff27914dc88ae0fdee9891a7aa5004229

21:39 <_whitenotifier-e> [nmigen] Success. 100% of diff hit (target 82.31%) - https://codecov.io/gh/m-labs/nmigen/commit/56bb42aff27914dc88ae0fdee9891a7aa5004229

21:43 <Junki> Nevermind, it did work.