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<larsc>
I think I proposed something similar a few months ago. good to know that somebody is actually implementing it
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<wolfspraul>
40 times penalty?
<wolfspraul>
I think an fpga emulation in a high-end icore could compete with that, no?
<wolfspraul>
lm32 would then run at 2mhz, not 80mhz? :-)
<wolfspraul>
don't tell that to werner
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<wolfspraul>
well ok, it wouldn't fit anyway
<wpwrak>
hey, still faster than an AVR with factory settings ;-)
<wpwrak>
i just skimmed the paper and didn't see what exactly the 40 times penalty refers to. oddly enough, they seemed to be happy about that factor. so i wonder what exactly it means.
<wolfspraul>
they are happy because it's better than the 100* in other attempts, they say
<wolfspraul>
everything is relative, no?
<wolfspraul>
I'm happy without any reason, now how is that???
<wolfspraul>
:-)
<wpwrak>
ah, have to put wine on my shopping list, too :)
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<larsc>
maybe I'm blind, but I'm unable to find their implementation. All references to "ZUMA FPGA" just point to the paper.
<larsc>
wpwrak: btw. it is not necessarily slower, just smaller
<larsc>
s/wpwrak/wolfspraul/
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<wolfspraul>
yeah who knows :-) I found too many dead ends to still care
<wolfspraul>
a lot of papers and text that is written as if they know *some* stuff and then decided "we have to report our results"
<wolfspraul>
recobus is the most advanced I think, but sadly they also just publish 5-10 page papers for conferences that are dead-ends for learning, in my experience
<mumptai_>
fpga on fpga?
<wolfspraul>
why not, you never know what becomes possible later, but the #1 thing imho is what lars said - where are their sources and does it actually run?
<wolfspraul>
too much talk... back to coding :-)
<larsc>
mumptai_: yes
<mumptai_>
if i was developing a new fpga+toolchain, i would probably like to do that, but otherwise?
<larsc>
well with the big vendor fpga you have the problem that you don't really know what's inside the fpga
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<mumptai_>
larsc, and they dont' tell that without an nda, or not at all
<larsc>
exactly
<larsc>
so an open fpga is a way better target for developing tools
<mumptai_>
but wrapping it again is only a first step
<lekernel>
aha! I got the bios to compile with gcc 4.8/svn and Nick's patches
<mumptai_>
i would actually like to have a model of the fpga for other reasons, but the vendors seem to dislike that
<lekernel>
ld later prints mysterious/fucked error messages "main.c:(.text+0xc): warning: internal error: dangerous error" though
<lekernel>
but still generates a binary...
<lekernel>
I see gcc copied clang's error/warning reporting :) hehehe
<larsc>
last time I tried to build openwrt with gcc 4.7 it just hogged all memory and cpu, hopefully it works again with those patches
<larsc>
openwrt for lm32 that is
<lekernel>
there's one patch that fixes a bug that resulted in a infinite recursion loop
<lekernel>
is that what you are talking about?
<larsc>
most likely
<larsc>
as i said gcc just started to eat all of my cpu and memory
<lekernel>
now there's still this weird linker problem...
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<wpwrak>
(virtual FPGA a "better target") of course, with a factor of 40, that gives you a lot of headroom for making a rather conservative model of the real thing. kinda what wolfgang is doing.
<wpwrak>
a car analogy: since we can't be sure all curves are safe to drive in at 240 km/h, we a) post speed limits of 30 km/h (that could be wolfgang's result) or b) don't allow cars that can go faster than 6 km/h (the 40x margin)
<wpwrak>
while a) would suck, it would still be 5x better than b) ...
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