lekernel changed the topic of #milkymist to: Mixxeo, Migen, Milkymist-ng & other Milkymist projects :: Logs: http://en.qi-hardware.com/mmlogs
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<GitHub164> [milkymist-ng] sbourdeauducq pushed 3 new commits to master: http://git.io/tFeMAA
<GitHub164> milkymist-ng/master 52be94f Sebastien Bourdeauducq: videomixer: handle HPD
<GitHub164> milkymist-ng/master a0f0285 Florent Kermarrec: lasmicon/multiplexer: fix rdcmdphase/wrcmdphase inversion
<GitHub164> milkymist-ng/master d0edb7e Sebastien Bourdeauducq: dvisampler: reset PLL at startup
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<barmstrong> sb0: I just really like the idea. I've used verilog some before, but I write Python for my day job. I was excited to see what Migen could do.
<barmstrong> sb0: I'm just going to try writing a cpu and then a small computer and then write a kernel for it
<barmstrong> the good stuff :)
<sb0> what about rewriting LM32 with Migen? :)
<barmstrong> That's tempting. I'm hacking out a DLX implementation to get my feet wet.
<barmstrong> I wanted to try to make a MIPS next
<barmstrong> lm32 has a lot of mips features, right?
<sb0> I'd say it's a bit simpler, doesn't have patent trolls behind it, can be implemented very well in FPGAs, and if well-done the Migen implementation could become the official CPU for milkymist-ng and get used in a bunch of stuff
<sb0> also, there's some work ongoing on direct Migen-to-EDIF synthesis
<sb0> and LM32 is the last big chunk of Verilog remaining in milkymist-ng, which would cause problems to get rid of Xst (and then the other ISE tools)
<barmstrong> hmm. interesting :)
<barmstrong> it looked like the opcodes were sort of mips-inspired
<sb0> and finally, you can always look at the original Verilog to help you
<barmstrong> by the way, have you played with django much? specifically, the orm
<sb0> I think it's fair to say it's one of the most tested open source softcore CPUs...
<barmstrong> there's some really magical stuff they do that i think might be interesting in migen, but i'm brand new to migen
<barmstrong> so I could be totally off the mark
<sb0> no, I haven't touched Django much
<sb0> do you have a link/examples of those orm features?
<barmstrong> huh, i hadn't thought of the verilog being there, but that's a good point
<barmstrong> there is an example there that transforms that definition into a sql table
<barmstrong> they play some tricks with python's __get__ and I think a bit of metaclassing
<sb0> ah, yes, that
<sb0> I saw some code using that indeed. didn't know it was called orm.
<sb0> yes, that could be a nicer syntax for Migen record layouts
<barmstrong> anyway, nice work with migen. I'm stoked that I can write all my unit tests in python
<sb0> thanks :)
<barmstrong> if I come up with any specific improvements, I'll probably just submit pull requests :)
<sb0> please send a patch to the mailing list instead, it's easier to merge
<barmstrong> ah, got it
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