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<dstzd>
has anyone here tried to get gamma control working on rk3399?
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<macc24>
HdkR: i got terraria to run on my arm laptop :D
<macc24>
i have to close everything else to free up the ram and it runs at 5fps but it's just a minor detail
<macc24>
need for speed carbon too
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<tomeu>
anybody knows if the kernel can get to know when the GPU started and finished executing a given vertex or fragment job?
<tomeu>
for profiling
<tomeu>
robmur01: maybe you would know?
<stepri01>
tomeu: The 'best' method is to insert "write value jobs" with either the cycle counter or system timestamp and then try to correlate the values back to real time
<stepri01>
the easiest option is to just look at the registers - and that might be sufficient for Panfrost for now because we're not queuing jobs on the hardware
<stepri01>
the blob makes use of write value jobs and has a ioctl to ask the kernel to provide both the cycle counter/system timestamp and real time at an instant for use in correlating back to real time
<stepri01>
cycle counter suffers from DVFS changing the speed. system timestamp is broken on some platforms. So neither is great
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<tomeu>
stepri01: makes sense, thanks!
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<alyssa>
warpme_: pong
<warpme_>
hello alyssa !
<warpme_>
probably you saw chat exchanges with daniels 6/11 12:25?
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<macc24>
good news, duet keyboard is just regular google hammer usb keyboard lol
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<alyssa>
Today's task: try to figure out how to even get started on Bifrost scheduling
<alyssa>
Task #0 is documenting all the scheduling constraints in the first place..
<alyssa>
The overall strategy is trying to decompose and simplify the problem space, so instead of having a massive list of constraints and a complicated cost function and trying to bruteforce something, we instead reduce to a sequence of "familiar" transforms.
<alyssa>
Yay formal methods...?
<alyssa>
I wrote up my list of constraints, threw a model checker at it, and found my model was horribly buggy.
<alyssa>
I guess I should be happy but why is this off by a factor of two :V
<alyssa>
Oh, right, ok, fine.
<macc24>
does anyone have working mainline kernel config for duet?
<alyssa>
why can't I have nice regular encodings
* macc24
has found patches adding display to mt8183
<bbrezillon>
alyssa: we have a precision issue on f16 blend shaders
<bbrezillon>
I wonder why it works on midgard
<alyssa>
bbrezillon: Oh?
<alyssa>
(Could you elaborate?)
<alyssa>
As you are well aware the whole blend shader stack is ... delicate ... so
<bbrezillon>
alyssa: I'm not sure what happens yet, but if I force f32 dEQP-GLES2.functional.fragment_ops.blend.rgb_func_alpha_func.src.constant_color_dst_alpha passes, but if I don't, it fails
<alyssa>
bbrezillon: Interesting. Could you send the DEBUG=shaders output? (NIR + disasm)
<alyssa>
Can't say I'm surprised, the entire bifrost RA is a hack that needs a proper, top-down designed replacement sooner than later
<alyssa>
Ugh...
* HdkR
stacks hacks
<alyssa>
well, I hve been nerdsniped
<alyssa>
let's see..
<alyssa>
---Oh, rip
<alyssa>
d'oh
<bbrezillon>
alyssa: lowering of blend consts => I agree, but that means not caching the NIR for such shaders, and that's the reason I didn't do it initially
<alyssa>
mh, cache the NIR just before lowering blend consts, so all the expensive stuff (algebraic, etc) is cached and all that remains is constant folding?