<azonenberg>
electronic_eel: yeah we still have to add the latch
<azonenberg>
i dont think resistors are needed, i'm assuming both legs are going to either a 100R diff terminator at the ADC or 50R per leg to ground at a scope
<electronic_eel>
if you don't use too long cables it will probably be ok
<azonenberg>
why would cable length matter if they're controlled impedance and terminated at the far end?
<electronic_eel>
the output impedance doesn't match without resistors
<azonenberg>
oh hmm
<azonenberg>
its not 100R diff output?
<azonenberg>
you're right
<azonenberg>
i should probably add resistors at the offset stage too then
<electronic_eel>
now the offset stage is on the same board, so the trace is electrically short at 100MHz
<azonenberg>
Yeah i'm more thinking about ringing / overshoot or anything like that
<azonenberg>
i'll add footprints, we can always 0R them
<electronic_eel>
yeah, good idea
<electronic_eel>
another point is the clipping diodes - these are expected do be used regularly when you set the gain too high, right?
<electronic_eel>
without series resistors before them I think they will get too hot, but if you put them after the resistors it is no problem
<azonenberg>
yes, that is the plan
<azonenberg>
and i was actually going to crunch numbers re power dissipation in the diodes shortly
<azonenberg>
This is very much an in progress design, lots of engineering calcs not done yet :)
<electronic_eel>
yeah, that is when it helps having multiple set of eyes looking at something
<azonenberg>
electronic_eel: So at this point are you pretty happy with the actual signal path? Can we call that tentatively done?
<electronic_eel>
there are no issues leaping to my eyes anymore
<electronic_eel>
but I haven't done a scope afe before, so maybe I'm missing something
<azonenberg>
Me neither, lol
<electronic_eel>
maybe add some easy-to-probe testpoints between the stages, to ease characterizing the board?
<azonenberg>
oh there will be test points everywhere
<azonenberg>
i normally do test point insertion at the final stage of a design once i work my way down the review checklist
<electronic_eel>
ah, ok
<azonenberg>
one of the items there is test points, so that's typically when i decide which signals need them
<azonenberg>
at the final stage of schematic review prior to moving to layout
<electronic_eel>
what kind of testpoints do you prefer when you want good rf performance / si?
<azonenberg>
It depends a lot on the situation. For 100 MHz almost anything will work :p
<electronic_eel>
yeah, but I'm sure you want to go above 100 and see where the limits are
<azonenberg>
well with a 100 MHz antialiasing filter i know exactly where they are :P
<azonenberg>
i will probably make a second load of the board at some point down the road with a wider bandwidth filter, or just 0R's, to see what it looks like without
<azonenberg>
for high speed digital, i normally just strip soldermask off the trace for a short distance then put a ground 1mm away
<azonenberg>
this fits my solder in low-Z probe tips
<azonenberg>
for 50/100 ohm RF i'd do the same thing
<electronic_eel>
and for inserting signals, like with a vna?
<azonenberg>
My plan for the moment is to do end to end vna measurements on the whole AFE
<azonenberg>
for higher speed rf they make really cool test points i have not used personally
<electronic_eel>
yes, end-to-end first, but maybe when you want to optimize some part having the option to use a vna would be nice
<azonenberg>
it's a mechanical SPDT switch that straddles a short gap in a trace
<azonenberg>
and is either passthrough or diverts it to a probe
<azonenberg>
physically inserting the probe triggers the switch
<azonenberg>
They look cool but i havent used them so cant comment on if it's worth it
<azonenberg>
For a characterization board, i would probably either put RF relays between the stages or just have SMA jumpers between them
<electronic_eel>
now that sounds expensive
<azonenberg>
Or even make each subsystem on its own board with edge launch SMAs at the ends
<electronic_eel>
for not-that-high rf I guess having a footprint for a mmcx or similar would be ok
<azonenberg>
Yes
<electronic_eel>
maybe with a solder jumper to disconnect it and not have a short stub line
<azonenberg>
Another thing you can do for seldom used test points is to have a 0R or ac coupling cap set up in a SPDT configuration
<azonenberg>
e.g. have two footprints in an L shape
<azonenberg>
sharing one pad
<azonenberg>
you need to hot air the 0R to set the mux, but if this is something only done during board bringup that's not a big deal
<azonenberg>
it's inexpensive and has good SI
<electronic_eel>
why hot air the whole part of the board for that? I often tweak resistor values with tweezers, that is much faster
<electronic_eel>
I mean solder iron tweezers
<azonenberg>
If i had them sure
<azonenberg>
But right now i have a handheld iron and hot air
<electronic_eel>
before I decided to invest in the tweezers I was using solder well tips to wick of whole resistors and caps
<awygle>
"make each subsystem its own board" is the typical RF approach
<electronic_eel>
how well does that work with diff signals? coax are just single ended and you easily get phase mismatches and so on
<azonenberg>
Ideally you'd use phase matched cables
<electronic_eel>
now you can get phase matched cables, but they are $$$
<azonenberg>
But this is the advantage of single board with 0R's etc
<azonenberg>
easier to skew match
<electronic_eel>
yes, exactly
<azonenberg>
Anyway, i think i'm going to save the PSU for last
<azonenberg>
probably going to do the MCU subsystem next as it's comparatively easy
<electronic_eel>
I'm going to bed now, getting late
<azonenberg>
stm32f031f6 in qfn28 probably
<electronic_eel>
I like the stm32f031
<azonenberg>
i have a bunch i bought for a sensor project and never used
<electronic_eel>
used it a lot (the stm32f030, which is the same die and same features)
<azonenberg>
5v tolerant io so i might not need level shifting
<electronic_eel>
the new stm32g0 look promising
<azonenberg>
one uart for talking to the host (no usb, i'll just have a pmod header with the standard uart pinout so i can plug in a pmod usb uart or similar)
<azonenberg>
then i2c to the dac and spi to the gain stage
<azonenberg>
plus some gpios to various parts of the afe
<electronic_eel>
I just bought a bunch of them and plan to do a small breakout
<azonenberg>
I'll have to figure out how to program it though, as i don't think it has JTAG
<azonenberg>
only SWD
<azonenberg>
and i dont have a swd programmer
<azonenberg>
for my bigger stm32s like the f777 i use 4-wire jtag
<electronic_eel>
they have 8k ram, the ram was often a bit of a weak point of the stm32f03
<electronic_eel>
do you have a jlink?
<azonenberg>
at work? yes
<azonenberg>
in my lab at home? no
<electronic_eel>
do you have one of these small stlink clones?
<azonenberg>
i have a xilinx platform cable, a pickit2, a pickit3, a bunch of digilent ftdi jtag dongles, and my homebrew ftdi jtag dongles
<electronic_eel>
you can reflash them to a black magic probe, then they work really well
<azonenberg>
or i could just buy a st-link v2
<electronic_eel>
if you want to buy something not from china, buy a stlink v3 or a jlink
<azonenberg>
$22 isn't a big deal
<azonenberg>
v2 is in stock at digikey, and i know it works with openocd and tools i've used in the past
<azonenberg>
so short term to get work done probably the best choice
<electronic_eel>
do you have one of the st discovery or nucleo boards? they have a stlink on them
<azonenberg>
hmm good call
<azonenberg>
i have some st devkits
* azonenberg
goes off to look
<electronic_eel>
you can disconnect them from the devboard and connect them to your own board
<electronic_eel>
you could also bring out the boot0 pin to a switch and use the serial bootloader
<electronic_eel>
I have done this on a few of my boards
<azonenberg>
ok well i'm off to play animal crossing for a bit. will be working on the mcu subsystem later tonight
<electronic_eel>
ok, I'm finally going to bed
<electronic_eel>
good night
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<azonenberg>
So apparently st now has a dual core cortex-M family (STM32H7)
<azonenberg>
has a 480 MHz M7 and a 240 MHz M4
<lain>
interesting
<azonenberg>
i wonder how that fits into the memory map and debug stuff
<azonenberg>
everything i've seen about cortex-m used hard wired address mappings
<azonenberg>
but obviously you cant have both cores start from the same address
<azonenberg>
up to 2 MB of flash and 1 MB of sram
<azonenberg>
240 pin 0.8mm TFBGA
<azonenberg>
i wish this had been around when i did integralstick lol
<azonenberg>
not that the F777 is a bad chip but
<lain>
I wonder if one core brings up the other
<azonenberg>
Not sure
<lain>
although, iirc on modern multicore systems, or at least some, they all actually start executing the same thing at the same time?
<lain>
but the startup code usually consists of "if I'm not on core 0, wfi"
<azonenberg>
interesting, not sure
<azonenberg>
i know in antikernel i threw all of the common designs out the window :p
<azonenberg>
cpu boots up in sleep mode with no threads running
<azonenberg>
then a hard wired state machine says "hey CPU - here's the physical address of an ELF, go start executing it"
<azonenberg>
this brings up one virtual thread, which then starts any other threads needed
<lain>
need to bring up a silicon fab so we can make antikernel socs :P
<azonenberg>
lol
<sorear>
riscv works like that and it turned into a problem for Linux because that's apparently *not* how other arches work - normally your boot code runs on core 0 and you have to poke a register to take other cores out of halt state
<azonenberg>
i like having the CPU be a "state machine accelerator"
<azonenberg>
that is subservient to fpga :p
<azonenberg>
and does nothing without the fpga instructing it to execute some block of code
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<Degi>
Hm tbh a µC to configure SPI and I²C devices would be neat
<Degi>
Would save on a bunch of FPGA space
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<azonenberg>
Degi: configuring a few i2c/spi devices is *nothing* compared to the amount of fpga space the ram controller, adc interface, and ethernet stuff will use
<azonenberg>
if you're used to ice40s etc, you probably have no sense for just how big a midrange artix7 is
<azonenberg>
You can fit something like 75 ice40lp1k's in an xc7a100t
<Degi>
I dunno I've almost never used ICE40s
<Degi>
Not sure how artix logic cells compare to ECP5 LUTs
<azonenberg>
in theory one artix LC should equal one lut4+ff
<azonenberg>
"logic cells" are entirely a xilinx marketing construct for converting lut6s to lut4s
<azonenberg>
the conversion factor varies a bit by family but is usually around 1.6 lut6 -> cell
<Degi>
Hm not sure if ECP5 has LUT4s tbh
<Degi>
And is the memory of xilinx in MB?
<azonenberg>
none of xilinx's chips since like 2006 or so have actually had lut4s
<azonenberg>
so they invented these fictional logic cells for comparing capacity to their older / competitor devices
<azonenberg>
The primary on chip memory in most xilinx parts is a 36 Kbit true dual port block, which can be split into two 18 Kbit simple dual port blocks
<azonenberg>
you can vary aspect ratio... 36 x 1K, 18 x 2K, etc
<Degi>
So it has 4860*36 Kbit?
<azonenberg>
No
<azonenberg>
oh sorry misunderstood what you were saying
<azonenberg>
the xc7a100t has 135 * 36 Kbit
<azonenberg>
or 4860 Kbits total
<Degi>
Ah yes
<azonenberg>
on chip memory is expensive, it takes up a huge amount of die area. If you need bulk memory you're expected to use external ram
<Degi>
That looks roughly on par with ecp5, slightly better. And neat transceivers.
<azonenberg>
block ram is for when speed matters more than size
<azonenberg>
I will probably use ftg256 or similar for the low end scope
<azonenberg>
its a 1mm pitch bga compatible with cheap fab processes, easy to lay out on basic design rules, but doesn't fan out the transceivers
<azonenberg>
all artix7 other than the 200t are available in that package
<azonenberg>
(the die of the 200t is physically too large to fit and still have room for bond wires)
<Degi>
Oh nice 1 mm
<azonenberg>
16x16 full array, with the middle mostly power/ground. It's quite easy to lay out on a 4 layer board
<azonenberg>
with oshpark design rules or equivalent
<Degi>
Heh the biggest ECP is 27x27 mm
<azonenberg>
oh i mean artix7 goes up to ffg1156 which is 35x35 mm :p
<azonenberg>
and if you think that's big you should see some of the ultrascale parts
<Degi>
Yeh sort on mouser by price descending on FPGAs, some really weird stuff
<azonenberg>
for example one of the larger package offerings for virtex ultrascale+ is FLGA2577
<azonenberg>
which is 52.5 x 52.5 mm
<Degi>
Hm is there something that fits into LGA sockets lol
<azonenberg>
i think its still a bga
<Degi>
Wonder how big the die is
<azonenberg>
and FSVH2892 is 55x55 mm
<azonenberg>
There is no single die
<Degi>
You kinda need to worry about thermal expansion probably
<Degi>
Ah
<azonenberg>
all of the larger xilinx parts are multiple dies on a passive interposer
<Degi>
The interposer is a silicon PCB?
<azonenberg>
they have an interconnect die made on a larger, like 45-65 nm, process with no transistors (relatively cheap to make, and high yield)
<azonenberg>
then flip chip bump a bunch of identical logic dies on top
<azonenberg>
the logic dies can be tested individually and only good ones used
<Degi>
How do you prevent it from cracking after soldering during thermal cycling? Springy BGAs?
<azonenberg>
and the same logic die design can be used on different interposers (or the interposer partially stuffed) in order to make different sized parts
<azonenberg>
The interposer is then bumped on the other side and mounted with TSVs onto a normal fr4 bga substrate
<Degi>
The ECP5 also has some kinda interposer, looks like FR4 or similar
<azonenberg>
that's called a substrate, and that's standard for pretty much all bgas other than WLCSPs
<azonenberg>
its job is just to fan out the flip chip bumps or wire bonds to normal pitch balls
<Degi>
Hm that's probably similar to how the ECP looks on the inside... Wonder if it has those caps too?
<azonenberg>
if you look here you can see what looks like 3 logic dies plus two HBM2 memory dies all sitting on one interposer (not visible, under the black underfill)
<azonenberg>
then that's on the fr4 substrate
<azonenberg>
this then has a heatsink on top, removed for the photo op
<azonenberg>
a heat spreader*
<Degi>
Kinda looks like a GPU
<azonenberg>
so the chip wont look like this when you buy it
<electronic_eel>
the actual figure no depends on the revision and stuff, but you should find it with that
<azonenberg>
yeah i see it
<azonenberg>
Everything else looking good? the DAC is a 4 channel unit which is overkill for the prototype but will be handy when we put four AFEs on one board
<electronic_eel>
I'm just beginning to look at it, give me some time to work through it
<azonenberg>
ok
<azonenberg>
like i said, at this point the relay latch and psu are known TODOs
<azonenberg>
but everything else should be ok
<electronic_eel>
the spi of the ADL5205 looks a bit strange to me. is it somehow bidirectional on one line?
<Degi>
Huh
<Degi>
Yeah its bidirectional
<electronic_eel>
why does every odd vendor think it is best to cook up it's own protocol variant?
<monochroma>
because engineers don't have enough reasons to question their chosen profession
<Degi>
Hm why does the LMH6552 have 100 Ohm and not 40/50 Ohm on its output?
<monochroma>
likely because it's 50 ohms single ended, and it's a differential amp, so 100 ohms differential
<Degi>
(Not sure if it needs any when the trace is short enough, but it should be 40/50 ohm per resistor, so that it has 100 ohm differential (40 ohm when it has 10 ohm internal resistance)
<Degi>
But 100 ohm per lead gives 200 ohm differential
<Degi>
FOr example for U6 on sheet Common mode shift (page 6) each output coax has 50 ohms, so that resistor should also have 50
<Degi>
(It says 50 ohm to drive a 100 ohm cable on page 20 of LMH6552 datasheet)
<Degi>
(And 50 Ohm for R4 is probably a bit too low, but not sure if that matters since reflections would be attenuated by the Pi attenuator anyways)
<Degi>
Hm the power supply should have 5.1 V zener clamps on the 5 V rails because of the input protection.
<electronic_eel>
azonenberg: the dac seems to be a bit overkill to me. 4ch is ok, bit it is quite pricey
<electronic_eel>
the vin_offset must go +-2.5V, correct?
<Degi>
Oh geez 70 bucks. On the other hand, this is a characterization board
<electronic_eel>
how about a much cheaper dac, which can only output 0-5v, and a simple opamp afterwards which shifts it to +-2.5V?
<electronic_eel>
Degi: I think the parts, incl. the dac, will also be used in the final board if they work out as planned
<electronic_eel>
so I think taking a peek at the price tag now is appropriate
<Degi>
16 bit and +- output is cheapest almost 40 € on mouser
<Degi>
I think shifting it down with a low offset OP amp as electronic_eel suggested would be way cheaper... yeh
<electronic_eel>
do we need 16bit res. for offset control?
<electronic_eel>
I think 12 bit is enough
<Degi>
Hmm I mean you should be able to do 1 LSB in the maximum amplification range
<Degi>
We could use something like the dac1220 and mux the output? if more than one out is needed
<Degi>
It takes 15 ms to settle, but how fast do you want to offset adjust?
<electronic_eel>
muxing the output? how do you want to do that when all channels are on at the same time?
<Degi>
Hm I'd use a capacitor on a MUX with low leakage and charge injection. Though 15 ms settling time of dac1220 may be unfeasible for that
<electronic_eel>
you lose your 16bit the moment you do that
<Degi>
Hm kinda
<Degi>
I mean if you have a pC of injection into a µF that's still 20 bits
<Degi>
And then buffer with low leakage op amp
<azonenberg>
electronic_eel: $70?? what world are you looking at
<Degi>
The LTC2664 on mouser
<azonenberg>
It's $37.74 on digikey
<azonenberg>
for 4 channels that's not unreasonable
<electronic_eel>
I didn't say 70, but 37 is still a lot
<azonenberg>
We can switch to something cheaper later on
<Degi>
Oh that was the dev board
<electronic_eel>
now, do we need 16 bits or are 12 enough?
<azonenberg>
My math a while ago was that 16 was necessary
<azonenberg>
at max gain in 12-bit mode we have 38 uV/LSB on the ADC
<Degi>
With no internal ADC gain?
<miek>
also it's $22 @ 25 units
<Degi>
Yes that sounds sufficient
<azonenberg>
oh and that 76 uV is after a divide by 2, so 152 uV/LSB at the input
<azonenberg>
if we only had 12 bit offset control, multiply by 16 so 2.43 mV offset steps
<azonenberg>
which sounds a little large
<electronic_eel>
ok, so 16 bits it is
<azonenberg>
i searched 16 bit dacs with a +/- 5V supply range on digikey and this looked like one of the better ones
<Degi>
And 13.35 € at 2500 pieces if we ever go into large production
<Degi>
Wonder if it would be possible to have a DAC which tracks the waveform, so that if you have a fast changing small amplitude signal on a slowly changing large amplitude signal you could track it and increase the resolution.
<azonenberg>
re the 100R resistors, i was going off the typical application circuit in the LMH6552 datasheet , minus the antialiasing filter as we have that ourselves externally
<azonenberg>
but we can fine tune later on, thats one of the points of a characterization board
<Degi>
Hm for the LMH6552 I'm seeing 50 ohm resistors on page 19/20. But yes we can see which value fits best.
<azonenberg>
yeah. "have resistors there" is the important part at this phase of the design :)
<electronic_eel>
how about a dac which outputs 0-5v and an opamp afterwards to shift to +-2.5V? that seems a lot cheaper solution to me
<azonenberg>
electronic_eel: how much cheaper can you find single supply low noise 16 bit dacs?
<azonenberg>
digikey has the 2664 for $20 or $5 per channel @ qty 100
<Degi>
I dunno you can get like 20 bits for the same price
<Degi>
(If you only need 1 channel that is)
<azonenberg>
i see the DAC8760 which is $8.36 for 1 channel @ qty 1
<electronic_eel>
oh, no maxim parts. they tend to vanish without further notice
<Degi>
Oh
<azonenberg>
Linearity on the DAC8564 is a lot worse
<azonenberg>
INL +/- 4 LSB vs +/- 2.5
<Degi>
Hm up to 12 LSB
<azonenberg>
then add in the extra stuff needed to do the dc shift
<azonenberg>
i'm not sure its worth it
<Degi>
Hm yes precision resistors cost some, unless you want to calibrate with low TC resistors. And µV offset OP amps aren't that cheap either. I mean the DAC is only 2.5 € per channel but I guess the rest makes up for that
<electronic_eel>
the resistors and opamp doesn't need to be that precise, they just have to be stable. you can cal out the rest
<Degi>
Well they'd have some temperature coefficient that could get relevant
<Degi>
If you offset by like 2 V at 70 µV per LSB...
<electronic_eel>
but cal'in out the inl is a bit too much, you'd need a full table for every output
<Degi>
Would you need to be able to reliably measure the generated offset for that or is the DAC enough for that? (but that only works for midrange codes for zero offset)
<Degi>
If the offset made a precise voltage, you could use that to calibrate the DAC
<Degi>
*ADC
<electronic_eel>
you would input a precise dc voltage an measure what the adc of the scope reads
<Degi>
But if the DAC can make a precise voltage, you could calibrate the ADC based off of that
<electronic_eel>
ah, you mean with the input shunted to gnd? yeah, that could work
<electronic_eel>
but after browsing through some datasheets I have to admit that the ltc2664 is a nice part
<Degi>
It even has SDI/SDO instead of SDIO lol
<electronic_eel>
yeah, proper spi, not some house-flavored abomination
<Degi>
Hm are there any plans for interfacing the input channels yet? Maybe u.fl connectors?
<electronic_eel>
azonenberg: two more suggestions for the mcu part: change the uart to PA9 and PA10: these are used by the internal bootloader. so if something with the swd makes problems, you can switch to that
<electronic_eel>
the other thing is that I'd add a mcu-controlled led to give some heartbeat/alive output, maybe another for errors like the relay tripped
<azonenberg>
Degi: edge launch SMAs for scope inputs
<Degi>
And they then stick out of the housing, right?
<azonenberg>
yes
<azonenberg>
they'd just stick through the front of the enclosure
<azonenberg>
SMA-J-P-H-ST-EM1 or very similar
<azonenberg>
and yes i'll add some indicator LEDs at the end once everything else is done
<azonenberg>
i dont want to waste gpios until i'm sure i dont need them for something else
<electronic_eel>
ok
<Degi>
Is there a reason for not using BNC? (And such pricy SMA connectors, though I can't find a cycle rating on them)
<electronic_eel>
I think azonenberg considers 2 things of conventional scopes outdated: 1M inputs and BNC
<Degi>
I've heard that BNC endures more mating cycles (and that type N is even better), that's why I wondered
<electronic_eel>
hmm, isn't bnc usually rated for 500 cycles like sma?
<Degi>
Nvm BNC connectors say 500 cycles on the digikey page and the SMA says that it should pass "100 cycles (w/Env.) 1000 cycles(w/o Env)" in the product specs
<electronic_eel>
N may be better, but it is really bulky for lab use
<Degi>
I only saw that on a spectrum analyzer once (and the RF generator here, but that's for power)
<Degi>
Huh the connector is rated for gas tightness for nitric acid vapor
<miek>
i'm so tired of bncs letting in the nitric acid vapor
<electronic_eel>
lol
<Degi>
Why not make a connector out of PTFE, solid platinum and gold lol
<Degi>
"For use inside of chemistry glassware"
<sorear>
gas _tightness_? this is an electical connector, not a pipe fitting/