<azonenberg>
can someone please look at the second page of this and see if you interpret the pinout the way i just did?
<azonenberg>
This is a 9202 series
<azonenberg>
I THOUGHT the pinout was 1-3-5 top to bottom on the left side and 2-4-6 top to bottom on the right, with the pin 1 mark at top left and the long axis of the relay going left-right
<azonenberg>
If i read this right, it looks like the ACTUAL pinout is 1-5-3 and 2-6-4
<azonenberg>
in other words, the pin numbering is totally wonky and i have signal and shield swapped
<azonenberg>
lain: ping
<lain>
yes hello
<azonenberg>
see above
* lain
looks
<lain>
I interpret it as 1-5-3 and 2-6-4 yes
<azonenberg>
So i guess that means some rework is in order
<lain>
also eep @ 654 mV on 1V8
<azonenberg>
who the hell designs a pinout that looks like this?
<lain>
that sounds suspiciously close to a diode drop
<azonenberg>
Yeah i am going to need to debug further
<azonenberg>
if you have a minute, can you look at the sch and layout and see if anything in the 1v8 jumps out at you?
<azonenberg>
i'm gonna go rework the relay then try getting a st-link to talk to the mcu
<lain>
transistor Q2 pinout and layout look correct
<lain>
U17 pinout and layout also look correct
<lain>
oh
<lain>
mmm yeah not sure.
<azonenberg>
Confirmed after cutting traces to 3/4/5/6 on the relay
<azonenberg>
center two pins are shorted
<azonenberg>
outer pins are open
<azonenberg>
so the signal is on the edge and shield is the midline
<azonenberg>
and this is one of the screwiest pinouts i've ever seen :p
<electronic_eel>
about 1v8 being low: could it be that D4 or D6 is installed backwards?
<electronic_eel>
that should give the effect of 1V8 being about a diode drop, as 1V8 can't source any meaningful amount of current
<azonenberg>
I'll double check that in a bit
<azonenberg>
electronic_eel: so D4 and D6 have their bars facing each other
<azonenberg>
i'm about to go to bed, but can you check the datasheets and confirm that's correct polarity?
<electronic_eel>
the vias to 1V8 are in the middle of the signal traces, so bars facing each other means the cathodes to 1V8 - which is correct
<electronic_eel>
just checked the diode datasheet, seems to be the correct diodes, also they don't have their bar mark at the anodes
<electronic_eel>
the tl431 footprint seems also to be correct. as the TL431 is notorious for pinout errors (different pin numbers for different 3pin packages), I already checked that during layout phase, but rechecked again
<electronic_eel>
so I can see nothing obviously wrong with the 1V8 rail I can see. so there is some more debugging in order
<electronic_eel>
my next step would probably be to inject small amounts of current into 1V8 and see how stable the 0,6 volts are
<electronic_eel>
another option would be to remove D4 and D6 to isolate 1V8 from other circuits and see how it behaves on it's own
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<Degi>
Did you test -5 V, -7 V, +7 V?
<Degi>
Because 5V0_N supplies the 1V8 regulator
<Degi>
If 5V0_N is broken, then 1V8 should fall within the base threshold of Q2
<Degi>
azonenberg: Can you send a pic from the top of the PCB?
<Degi>
And maybe of the backside if there are components
<Degi>
C15 is correctly placed?
<Degi>
Is 3V3 good?
<Degi>
And what is 5V0_P?`
<Degi>
Nvm ZNC somehow didnt send any logs before the 0V9 message, found them online
<Degi>
Hm yeah the rails look good enough
<Degi>
Oh wow ZNC buffer was set to 500. No wonder messages go missing...
<azonenberg>
Degi: (20:01:13) azonenberg: -4.926V on 5V0_N
<Degi>
Yes ZNC deleted that... sorry
<azonenberg>
this was also measured via an 8-bit scope with a long ground lead. My one DMM is out for calibration and the other was in use for something else
<azonenberg>
so if i really want more accuracy i can set that up
<azonenberg>
but i think its safe to say the other power rails are fine
<azonenberg>
my first guess would be that one or both of the diodes are wired wrong
<azonenberg>
oh wait no those diodes i was looking at are for the relay
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<Degi>
You know that you bought a quality product when the datasheet says "ESP pressure 4K V"
<Degi>
*EST not ESP
<azonenberg>
Degi: lol
<azonenberg>
just got an envelope from oshpark
<azonenberg>
havent opened it up yet but i expect it's the HMCAD1520 board
<azonenberg>
and yes it is
<azonenberg>
i'll try and assemble that tonight
<Degi>
Neat
<Degi>
Have you figured out what causes the 1V8 thing?
<electronic_eel>
it's like christmas with all those packages showing up...
<electronic_eel>
about the unstable 2V5_REF - did you look at it with a scope? did it look like oscillation?
<azonenberg>
electronic_eel: i scoped it, it looked like a sinusoidal pattern of some sort. But i didn't study it in great detail
<azonenberg>
Degi: no, the 1v8 issue is not yet solved
<azonenberg>
as of now there are three known issues: 1v8/2v5_ref being bad, and the relay not blocking signals properly
<azonenberg>
the relay issue was due to the bad pinout and i've reworked the board
<azonenberg>
the power rail issues have not yet been studied in any significant detail
<electronic_eel>
relais tend to have strange pin numbering, but this one is really borked
<azonenberg>
yes
<azonenberg>
Lol
<azonenberg>
anyway i just pushed an update to the footprint with correct pin numbering
<electronic_eel>
you wrote "oh wait no those diodes i was looking at are for the relay", was that related to my idea to check D4 and D6 (the ones on VOUT, going to 1V8)?
<azonenberg>
yes
<azonenberg>
i need to double check the output schottkies still
<azonenberg>
But i have stuff to do for work now that the hvac guys are gone, so it will be a while
<electronic_eel>
ah, ok, you are busy. when you have time again, do you plan to continue bringup / debug on the afe, or build the adc board first?
<azonenberg>
I plan to populate the adc board to clear parts off of my bench
<azonenberg>
but probably not do more than a basic smoke test on it yet
<azonenberg>
i want to focus on debugging the afe
<azonenberg>
oh and probe characterization boards are out for delivery too
<azonenberg>
so i have that to assemble when they come in
<electronic_eel>
as I said - christmas
<electronic_eel>
I just read the datasheet of the MCP1501 re the unstable 2V5_REF output
<electronic_eel>
they are a bit vague about capacitative loads and even contradict themselves once
<electronic_eel>
5.1.2 says the max cap load is 300pf, but in 5.2.1 they use 1nf in the schematics
<Degi>
We have like 470 nF
<electronic_eel>
also the phase margin graph is extremely sparse, only given for the 4.096 variant and just a few load conditions
<electronic_eel>
Degi: have we? I thought it is just 300pf (C48)
<azonenberg>
Do you want to switch to a different regulator for 2v5 in the future to ensure we know what conditions it remains stable under?
<azonenberg>
electronic_eel: C15
<azonenberg>
0.47 uF in the offset stage
<azonenberg>
i can try removing that?
<electronic_eel>
I'm not sure about that yet. With these stability things you often have to test it out with the actual circuit
<Degi>
Maybe add a loading resistor
<electronic_eel>
ah! I missed C15
<Degi>
Sometimes they get stable over a larger range when that happen
<Degi>
s
<electronic_eel>
I think that is too large for the ref
<electronic_eel>
yes, I would try to remove C15
<electronic_eel>
if C15 fixes it, I would test the margin we have by adding different caps until it begins to oscillate again
<azonenberg>
whats annoying is, i have "check linear regulator stability with chosen output cap" as a review checklist item
<electronic_eel>
did you miss C15 like I just did?
<electronic_eel>
with stuff like refs, where the Cs are critical, I tend to just put them next the ref itself in the schematics to mitigate that problem
<azonenberg>
no i missed that the reference was a linear regulator :p
<azonenberg>
i was thinking of it as a zener
<electronic_eel>
oh
<electronic_eel>
my experience is that refs are much more critical with caps than regular ldos
<electronic_eel>
at least when you use better ldos and not the cheapest crap you can get
<azonenberg>
LT3093 is not exactly "cheapest crap you can get" :p
<electronic_eel>
no, but they don't oscillate, or?
<azonenberg>
i've seen no evidence of it
<azonenberg>
my point exactly :p
<electronic_eel>
the ldo manufacturers know this problem and engineer their ldos to be tolerant for cap loads
<electronic_eel>
but the ref manufacturers optimize for tempco and long term stability and so on
<electronic_eel>
high psrr, low noise,...
<electronic_eel>
and that often goes against the allowed cap load
<azonenberg>
Just added a line to my checklist to clarify this
<azonenberg>
(i swear, that design review checklist is basically a laundry list of my past board mistakes lol)