<bvernoux>
I have just finished to buy stuff at Mouser and the great news is now ChipQuick Solder Paste PbFree or Pb can be stored unrefrigerated between 20 to 25°C which is amazing
<bvernoux>
and so for 12months
<azonenberg>
bvernoux: i have been using that paste for the past year or so
<azonenberg>
works quite well
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
<miek>
oh nice, i didn't know they did that. i've been using loctite gc-10 for the same advantages, but it's hard to find in small amounts
<azonenberg>
miek: yeah it works nicely, prints well, i havent noticed any differences in behavior vs "standard" refrigerated paste
<azonenberg>
and for a small lab like mine the lack of need for a fridge is a huge plus
<Degi>
Idk I just chuck my stuff into the kitchen fridfge
<azonenberg>
even if i was ok with putting pate in a food fridge
<azonenberg>
the lab and kitchen are literally as far away from each other as they can possibly be while remaining in the same building
<azonenberg>
the lab is on the first floor front right corner, kitchen is second floor back left
<azonenberg>
it would be a long and annoying trip up stairs and back to get one thing
<Degi>
Hmm the kitchen is the second farthest room from my bedroom, its like 7 m long way round and 2 m short way
<azonenberg>
i'd need to walk from the soldering bench to the door (5m), make a right, go through the sar room (3m), make a left and go to the other side of the sar room into the hallway (3m), make a left, up the stairs to the front door (2m)
<Degi>
sar room?
<azonenberg>
turn around, up the stairs to the dining room (2m)
<azonenberg>
across the living and dining room (3m), make a left, fridge is in the far side of the kitchen (2m)
<azonenberg>
so around a 20m walk i would say in total. seems kinda silly
<azonenberg>
I volunteer with a local search-and-rescue agency, we have a room downstairs that is supposed to be some kind of entryway to the garage (now my lab)
<azonenberg>
it's not useful for much because it has doors to the lab, hallway, bathroom, and two bedrooms
<azonenberg>
so there's very little floor or wall space you can put stuff in without blocking paths of travel
<azonenberg>
So i store my backpack and gear there
<Degi>
Ah yes that makes sense
<azonenberg>
literally 100% of two walls are filled by doors or clearance space for doors on the other walls to swing into
<azonenberg>
and the other two walls each have one door on them and maybe 1.5-2m of usable space for shelving and cabinets
<azonenberg>
That room is also a good choice for the purpose because it's the closest room to the front door other than the living room (living room is up the stairs, this room is down and through a doorway)
<azonenberg>
Which means when i come home from an incident tired, dirty, wet, and probably covered in mud and leaves and stuff
<azonenberg>
i'm not tracking dirt through more of the house than strictly necessary :p
<Degi>
Heh yeah
<Degi>
Maybe add a decontamination shower
<azonenberg>
Lol
<azonenberg>
in all seriousness i have been known to hose off my boots and gaiters before entering the house
<azonenberg>
(and take them off on the landing so i don't get the steps wet and slippery)
<azonenberg>
you think you get dirty going on a hike in a state park, on trails? off trail in swamps is 10 times worse
<azonenberg>
And of course the people we're looking for never manage to get lost on dry, solid trails :p
<Degi>
Idk the last time I went hiking I was pretty clean afterwards
<Degi>
Haha and they detonated something in the mountains because a river was blocked or so. And military exercises of course. Guess the country heh
<azonenberg>
Lol
<Degi>
And some metal plates holding a wire suspended bridge looked a bit worn
<Degi>
And bent
<azonenberg>
well the thing is, where i live, we get an average of 96 cm of rain per year
<Degi>
Over the whole year or per day?
<azonenberg>
Over the year. This is one of the more "average" parts of the state
<azonenberg>
one of the wetter areas i just looked up stats for gets 2.3 m per year
<azonenberg>
And the climate is very seasonal - the summer often goes weeks or even a few months with no rain
<azonenberg>
then we get all of that rain from around october to april
<Degi>
Hm yeah
<Degi>
Idk 96 cm kinda sounds like not very much but idk
<azonenberg>
So *everything* is muddy
<azonenberg>
average rainfall per year in berlin is 59 cm
<azonenberg>
by way of referenec
<Degi>
Hm over 100 days isnt that like 5.9 mm per day?
<azonenberg>
well i imagine berlin's rainfall is more spread out through the year
<azonenberg>
London is around the same
<Degi>
Yeah its usually decently dry around here and the streets are very seldomly flooded, though there are other places in germany which literally get flooded where houses get destroyed... We don't have that around here though. Maybe a few cellars
<Degi>
Once there was heavy rain and there was a 10 cm fountain coming out of a water drain, or like the school yard being half underwater, nothing bad
<azonenberg>
oh, and then the Lake Quinault area, which is a bit further away from here but wetter, gets 3.5 meters of rain per year
<azonenberg>
as you get up into the mountains, some areas get as much as 5m
<Degi>
Theres like this city called Regensburg which translates there to rain castle. We were there a few years ago and a week or two after we went away, it was flooded very badly heh
<azonenberg>
anyway, the point is that the ground is rarely dry during the wet half of the year :p
<Degi>
Heh yeah
<azonenberg>
also, status update... pcbs for the probes ordered
<azonenberg>
getting 100 as i have enough interested people i plan to move straight into low volume production
<azonenberg>
Bare PCBs were 855 USD for 100 units so 8.55 USD each
<Degi>
Huh
<Degi>
Are they made out of solidified diamond
<azonenberg>
No, RO4350B
<azonenberg>
Lol
<azonenberg>
for a hundred boards on an exotic RF material with controlled impedance that doesn't sound unreasonable at all. in fact it's very cheap
<Degi>
Does "shipment on hold" mean anything?
<Degi>
"Available at a fraction of the cost of conventional microwave laminates," huh
<azonenberg>
probably means covid issues mean they don't have either a driver or a vehicle to move it
<azonenberg>
yes, 4350B is cheap as rf materials go
<Degi>
"The selection of laminates typically available to designers is signifi cantly reduced once operational frequencies increase to 500 MHz and above." Dont people use FR4 of PCIe 4.0 heh
<azonenberg>
well it depends on how much loss you are willing to tolerate and how long the lines are
<azonenberg>
for serdes with heavy equalization you can handle a lot of loss
<azonenberg>
pcie gen4 allows up to 20 dB of total loss
<Degi>
Yeah 2.0 only has like 13 dB but thats only at 2.5 GHz
<Degi>
Not 8
<azonenberg>
But this is test equipment, so i need to not only pass the signal
<azonenberg>
i want it essentially unchanged
<Degi>
Yeah
<azonenberg>
i want <<1 dB loss from the nominal probe attenuation of -20 dB
<azonenberg>
but yes, 8.55 USD per board is pocket change considering the *resistors* cost something like 2.3 USD each in low volume lol
<Degi>
Lol
<Degi>
Is that like 12 $ of resistors
<Degi>
What does the plastic cost?
<Degi>
And the SMA?
<azonenberg>
2.39 per resistor is digikey qty1 pricing, although that drops to 1.61 @ qty 100 for the 50 ohm assuming i populate all boards
<azonenberg>
1.47 for the 100 ohm
<Degi>
Hmm damn I want a resin printer... That'd be fun...
<Degi>
But the one I want is apparently not available for sale or something huh
<Degi>
Ooh maybe I could get a cheap FDM 3D printer and mod it to print the glass ceramic paste
<azonenberg>
and then the 75s are 1.47 too
<azonenberg>
so i'm looking at 4*1.47 + 1.47 + 1.61 = 8.96 in resistors, 2*0.67 = 1.34 for the tip/ground sockets, and $3.46 for the SMA
<Degi>
Hmm can a low reflection RF load be made out of a PCB? Like a few meters long, thin 50 ohm transmission line?
<Degi>
What does the plastic printing cost in that volume?
<azonenberg>
so for one populated board, $22.31 not counting assembly labor or solder paste
<azonenberg>
not including enclosure or tip/ground etc
<Degi>
What do comparable probes from like lecroy etc cost?
<azonenberg>
I'm getting there :)
<Degi>
Oki
<azonenberg>
The shell in black MJF nylon is 13.50, i don't think shapeways does quantity discounts. If i wanted acrylic photopolymer it would be $45.72. Don't have prices for injection molding yet, i don't think it's viable at qty 100 but if these sell i might look into doing it for the next batch
<azonenberg>
i ordered one prototype of each but at this time, i plan to use MJF for production units
<azonenberg>
Which brings us to $35.81 for an assembled probe with no connections. Add in let's say $1 for a nice label on the side with a logo, part number, serial number, etc
<azonenberg>
so $36.81. now we get to the expensive stuff, the accessories from PMK
<azonenberg>
Tips are $31 for 5, so $6.20 each. I only intend to supply 1 to keep costs down, as i've never worn out a scope probe tip
<Degi>
Hm tips?
<Degi>
Like a bit of pointy metal?
<azonenberg>
Yes
<azonenberg>
that's not even the expensive part
<azonenberg>
The narrow ground blade is $21, the z-ground is $16, and a 7cm flexible ground wire is $28. If i include all three, it's $71.20 per probe in accessories. I then need to add in the amortized cost of $250 shipping from PMK to me, so $2.5 brings us to $73.70 in PMK parts
<azonenberg>
Adding in the parts i source, we're at $110.51
<Degi>
250 $ shippinh?
<azonenberg>
Yes, it's not cheap. They wouldn't do it for less
<azonenberg>
plus my time and solder paste for assembly, and a minimal "does it work" sanity check
<Degi>
Is it like when you order on mouser and they want 20 € for shipping for orders less tahn 50 €?
<azonenberg>
and selling the student edition at $125 i'll be just breaking even
<Degi>
Hm yeah
<azonenberg>
i think all 3 accessories are a must: narrow ground has best signal quality (wide blade isn't much better), z-ground gives a wide range of adjustment, and the flex ground is needed for browsing stuff not near a ground at lower speeds
<azonenberg>
($125 plus shipping that is)
<Degi>
Hm what is the flexible ground wire? cant find it on pmk
<azonenberg>
890-400-808
<azonenberg>
it's just a wire with a machine pin socket at one end and a pin on the other end, and some heatshrink. i could probably get them made cheaper but for now i want to use premade to minimize labor on my side building stuff
<azonenberg>
then for the commercial edition i'll need to do vna and dc resistance measurements and print out a basic test certificate (not saving any data, just verifying it's within spec), and for pro i'll need to save all of those files associated to the probe serial number and make a whole cal certificiate
<Degi>
Hmm the plastic is 13.5 $ in volume 1 too?
<azonenberg>
it's 3d printed, doesn't really get cheaper in volume
<azonenberg>
you just print more of them
<Degi>
WEll shipping etc
<azonenberg>
that's the advantage and disadvantage of 3d printing
<azonenberg>
that was the manufacturing cost only
<Degi>
Hm ok
<azonenberg>
shipping is negligible if you don't do like next-day or something, might even be free on larger orders
<Degi>
Hmm I think I dont really understand how in 12 bit mode the hmcad does the data
<Degi>
Like if we have 500 MHz sample rate, we have 750 Mbit/lane
<azonenberg>
Look at figure 3 of the datasheet
<azonenberg>
input clock is the sample clock, you can see LCLK is significantly faster
<Degi>
Yeah I see, I guess the internal pll makes the lclk then
<Degi>
Argh I wanna have a hmcad to play with now, it sounds kinda fun
<Degi>
Like the LCLK can be configured to be 90° phase shifted, there is a frame clock... So easy to interface with
<electronic_eel>
didn't read the chat backlog, but I made some research into logic analyzer probes
<azonenberg>
oh?
<electronic_eel>
commercially available ones seem to nearly all use a 10:1 rc divider scheme with about 100k impedance
<electronic_eel>
I found some interesting forum threads:
<electronic_eel>
this is a schematic of a active rigol la probe. no need to read the rest of the thread, they are designing a low-cost alternative that fits into rigol scopes there
<electronic_eel>
rigol also uses LMH7322 in the probe pods as planned for CONWAY. In the thread on poster notes that the LMH7322 in rigols pods get quite hot (>60°C), even they use just it just with 6.4V supply
<azonenberg>
yes mine ran a bit warm on the last board i used them iirc
<electronic_eel>
There are some teardowns and analyzes of keysight and tek la solutions posted and linked.
<electronic_eel>
I also did some testing of my own with a ez-hook probe and some 74LVC logic gates (at 5v for sharper edges, unfortunately I didn't have some AUC gates at hand)
<electronic_eel>
just the stub wire of an otherwise unconnected probe had just a small effect on the signal
<electronic_eel>
with about 10cm wire after the ez-hook probe the effect was stronger, but still no catastrophic effects
<electronic_eel>
when adding 100k to ground after the 10cm wire, the signal began degrade visibly, maybe parasitic capacitance?
<electronic_eel>
add any capacitance to the 100k in parallel and the signal really degrades, even 1 or 2pf matter
<Degi>
Heh and our preliminary design has adjustable ref per channel
<electronic_eel>
Degi: rigol has the dac in the scope and sends it down a wire to the pod, so I can understand that they only have one ref per pod
<azonenberg>
yes that will be a nice feature nobody else has
<electronic_eel>
but I think having the dac on the pod is superior
<azonenberg>
electronic_eel: that sounds a lot noisier too
<electronic_eel>
I more worry how to get signal degradation on the dut down to a reasonable level
<Degi>
Wonder if I can stick a LA on the PCIe card. Imagine reading out a USB stick to RAM lol
<azonenberg>
electronic_eel: well, my high end LA is going to be a completely different architecture
<Degi>
Hm I think we should offer splitters too,
<Degi>
like inline USB splitters. I mean you already have one for 8P8C right
<azonenberg>
Degi: you mean usb inline with probes?
<electronic_eel>
even a "low end" la should have good performance
<azonenberg>
i have one for usb2, but i want to respin it with some tweaks
<Degi>
I mean something like a USB cable but it has a second port to stick a LA onto while not degrading the signal
<azonenberg>
Yes i have that
<azonenberg>
with SMA probes, for usb 1.x/2.x
<azonenberg>
it needs a respin but it works
<azonenberg>
electronic_eel: The high end one will be based on Kintex-7 GTX's, with 50 ohm inputs passing through a HMC674 and adjustable threshold
<azonenberg>
12.5 Gsps, several Gbps data rates should be achievable oversampling
<Degi>
Is that the thing from freesample?
<azonenberg>
the comparator is the same one i am using on freesample yes
<azonenberg>
it's capable of 10G data rates, although the GTX won't since this is a LA and i'm not doing clock recovery as a result
<azonenberg>
since i need to keep the timebase constant on all channels
<electronic_eel>
but that design expects low impedance outputs, ie 50 ohms, not just some basic cmos stuff
<azonenberg>
electronic_eel: it will use the same 10:1 transmission line probe i'm doing for analog stuff
<electronic_eel>
the CONWAY la should be designed for probing regular cmos circuits
<Degi>
Hmm maybe a mini LA with like a gig of RAM or so for like 50 € would be fun
<azonenberg>
the CONWAY LA needs higher impedance since it's targeting stuff like i2c that might have pullups
<electronic_eel>
correct, i2c even has higher impedance and is a clear target for CONWAY
<Degi>
Can I use resistive 6 dB splitters on PCIe? Like that'd be kinda pushing the spec but it could work
<azonenberg>
meanwhile, the not-yet-named GTX based LA will be meant for sniffing things like 1000base-X, DDR3, etc
<Degi>
Hm would the current LA have the ability to decode DDR signals?
<electronic_eel>
yeah, but you can expect the user to do more probing effort there. with CONWAY we want some easy to attach grabber probes
<Degi>
Hahaha could I increase the signal sensitivity of the ECP5 SERDES by setting it to high Z mode and using a 10:1 transformer
<electronic_eel>
for CONWAY I think we also should use a rc divider like the other LAs, to get larger allowed voltage range
<azonenberg>
structured how exactly?
<electronic_eel>
but we aren't set on 10:1, we could use a lower attenuation to get capacitance down
<azonenberg>
i didnt see a schematic in the eevblog post
<electronic_eel>
at the end of the post is a png with the schematics
<azonenberg>
aha it was attached not inline
<azonenberg>
R5 we caon omit, what's the function of C2?
<electronic_eel>
there is a typo, it is the LMH7322, not LMH7332
<electronic_eel>
c2 is to keep the 10:1 ratio with C1
<azonenberg>
bandwidth limiting filter?
<azonenberg>
oh
<electronic_eel>
so if we lower the ratio, we could reduce the overall capacitance
<azonenberg>
Want to throw together like a 4:1 divider and see how it looks in simulation?
<Degi>
Hm could we just use PCB capaciors
<Degi>
And whats R4 for
<electronic_eel>
yes, 4:1 looks like a reasonable thing for us. skip the negative voltage
<azonenberg>
Degi: i assume R4 is to flatten out the frequency response
<azonenberg>
so you dont have lower impedance for fast edges
<Degi>
Hm skip the negative voltage?
<electronic_eel>
yes, we don't need to probe negative voltage, don't we?
<electronic_eel>
just need protection against negative
<azonenberg>
we just want to survive minus a few volts
<azonenberg>
yeah
<Degi>
RIP ECL
<electronic_eel>
no negative ecl for recent designs anymore
<Degi>
Hm how many pins do the laptop ram sticks need for data?
<azonenberg>
a sodimm is 64 DQ pins
<azonenberg>
plus all of the control/address and DQS puts you over 100
<Degi>
Hm okay
<electronic_eel>
we could also think about adding a resistor (R1), or even the whole R1, R4, R2, C1 part, directly on the grabber connector
<electronic_eel>
could be a small pcb or if it is just R1, a tht resistor
<azonenberg>
i was thinking a tiny pcb that mounted all of the attenuator in the little grabber
<Degi>
Hm we could use the capacitance of that resistor as the high side cap
<azonenberg>
we want something that holds a channel number logo etc
<azonenberg>
so if we could make a tiny pcb or something that would work nicely
<electronic_eel>
within the grabber is hard, as you'd have to either make your whole own grabber, or dismantle premade ones
<azonenberg>
i mean the little "flag" that goes onto the grabber
<electronic_eel>
the grabber pin seems to be something you can't solder onto, at least with my grabbers
<azonenberg>
yes
<azonenberg>
i'd assume we need a socket
<electronic_eel>
so something like the probe tip socket, just for 0.6mm
<azonenberg>
the probe tip socket we have fits 0.51 - 0.8
<azonenberg>
so we might even be able to use the same thing
<electronic_eel>
do you have the part number at hand?
<electronic_eel>
for the probe tip socket of the passive probe
<azonenberg>
ED11455-ND
<azonenberg>
is the digikey sku
<azonenberg>
the mill-max part number is long and annoying
<electronic_eel>
-ND is always digikey
<azonenberg>
Yeah
<azonenberg>
i made a joke a while ago about somebody touring their facility showing off their guest badge in a photo op
<azonenberg>
asking if it was a VISITOR-BADGE-ND
<azonenberg>
And like i mentioned it is meant to be a PTH receptacle that's soldered into a hole and then lets you insert/remove a pin
<azonenberg>
edge launch operation is an off-label use :p
<electronic_eel>
have you tried it with a ez-hook style pin, does it properly make contact and does it retain it properly?
<azonenberg>
Not tested yet. Give me a few mins and i'll report
<Degi>
Are DIMMs backward compatible?
<azonenberg>
Degi: DDRx are generally not compatible between generations
<azonenberg>
the sockets are keyed differently to prevent damaging stuff
<Degi>
Hm ok
<azonenberg>
they run at lower voltage for starters each gen
<electronic_eel>
the regular pin header receptables make contact, but aren't retained properly, they easily fall out
<Degi>
I yet need to figure out what DIMM I can use on a ECP5, because tbh a handheld 5 Gbit/s high speed decoder or LA for < 100 € would be very fun
<Degi>
Otoh, only 250 V ESD is a bit low it'd need a few more chips
<azonenberg>
Degi: the mill-max connector mates beautifully
<electronic_eel>
nice
<azonenberg>
there isnt a lot of clearance so we'd need careful pcb design to make things fit
<azonenberg>
but it should be doable
<electronic_eel>
so a small pcb with heat shrink around would be possible
<Degi>
Is that the connector on the probe?
<azonenberg>
electronic_eel: correct
<azonenberg>
or even a tiny 3d printed shell or something
<azonenberg>
but that might be tricky wrt thickness
<electronic_eel>
I have made good experience with just heat-shrinking small pcbs
<azonenberg>
Degi: yes we're talking about making an attenuator that fits right onto the grabber
<Degi>
Ah yes
<Degi>
Hmmm can we put holes into a PCB and put SMD resistors there
<electronic_eel>
why holes?
<Degi>
Super flat PCB
<electronic_eel>
0201 aren't high either
<electronic_eel>
but 3d milling is exotic
<electronic_eel>
and expensive
<Degi>
Hm I mean using mechanical holes and PTHs
<Degi>
But that was just a fun idea, not sure if of any use
<electronic_eel>
azonenberg: I read a bit of the irc backlog. you posted some probe shell pictures. why is the front part of the probe with the resistors and the socket not covered?
<azonenberg>
electronic_eel: that is the first prototype, i may tweak it
<azonenberg>
basically i want to avoid making the tip of the shell bigger than it has to be
<azonenberg>
because i don't want to crowd out other probes hitting stuff in close quarters
<electronic_eel>
but there could be bare wires near the dut, touching the resistors
<azonenberg>
Yes, i am going to try and make a separate tip cover, maybe out of a different material that can survive thinner walls
<azonenberg>
as a separate piece
<electronic_eel>
so the problem is the minimum allowed material thickness to get enough rigidity for holding the probe+sma?
<azonenberg>
The critical dimension for min thickness is actually where the positioner grabs it
<azonenberg>
i had to move from the pico passive probe positioner meant for the normal probes, up to the one meant for tetris which has a fatter opening
<azonenberg>
and i still was only at 600 μm minimum wall thickness, which was below shapeways's minimum for glass filled nylon
<azonenberg>
but by switching to MJF nylon with no filler, it was manufacturable
<electronic_eel>
hmm, but the tetris holder means you can't turn the probe in the positioner
<azonenberg>
the problem is that i need to have silhouettes of the tip sockets extruded all the way t othe end
<Degi>
Hmm can we just cover the probe in a tiny layer of plastic, how much would that affect performance
<azonenberg>
in order to get the pcb into the shell
<azonenberg>
the alternative is soldering after the shell is installed, which is awkward
<azonenberg>
and well, the probe is no longer cylindrical in cross section
<azonenberg>
so rotation is awkward anyway
<electronic_eel>
but I think rotation is necessary for the distance to ground
<azonenberg>
yes, this is a problem tetris never fully solved IMO
<electronic_eel>
just used my passive probe with spring ground and holder the last few days and I always had to rotate it to get the proper distance
<azonenberg>
spring grounds are a nightmare
<azonenberg>
i have never been able to use one in a holder
<electronic_eel>
I soldered ground wires to the pcb, sticking up. then I touched the pin from the spring ground to the wire
<electronic_eel>
this worked quite well
<azonenberg>
i see. and one thing i want to try is using a flexible, say 20 AWG, solid insulated copper wire as a ground lead
<azonenberg>
and simply form it to shape as needed
<azonenberg>
or even cut to size
<azonenberg>
I can mention this in documentation as an allowable grounding option
<Degi>
Or desoldering braid
<azonenberg>
well this will fit into the tip socket
<azonenberg>
no soldering needed, you can just touch it to the DUT
<electronic_eel>
ok, so there will probably be a custom holder design necessary to allow the probe to be rotated
<azonenberg>
Yes. I would like to build such a thing eventually as a separate accessory
<azonenberg>
but it's not going to be stock or included standard
<azonenberg>
And i think if we offer a hand formable, semi-rigid ground wire option
<azonenberg>
it will be far less necessary to have
<Degi>
Ohh can we have probes mounted with servos or xyz positioners
<electronic_eel>
Degi: mount one to a space rocket ;)
<Degi>
Lol
<Degi>
Hmm also the ECP5 can loopback the SERDES so I can just use that as an inline analyzer and repeater at the same time.
<azonenberg>
Degi: if you actively proxy you add latency, but that is a viable option if you can break the trace
<Degi>
Well a few hundred picosecs
<azonenberg>
but now you're doing digital sniffing, not analog SI analysis
<azonenberg>
very different use case
<Degi>
I mean for a LA
<Degi>
Hm the path is from input thru an equalizer, two MUXes and an output amplifier
<electronic_eel>
another thing I read in the irc log: the problem of creating a 640 Mhz and 1 GHz clock for the ADC with one pll
<Degi>
I think we wanted to use 500 MHz and 1 GHz
<azonenberg>
my current plan is just to run the adc at 500 MHz
<electronic_eel>
why can't you use two pll ics for this?
<Degi>
Idk
<azonenberg>
we can, but then we run into difficulties of maintaining phase accuracy between them
<electronic_eel>
and lock both of them to a common 10Mhz ref
<azonenberg>
including skew
<azonenberg>
500/1G are integer multiples of the same. It makes it *much* easier to align traces from both sides
<azonenberg>
and with clock muxes, now we have to calibrate propagation delay through the muxes etc
<azonenberg>
it's much easier if we can just length match traces to each ADC
<azonenberg>
and then rely on signals hitting them in phase
<Degi>
Hm I mean we could use 1 PLL for each ADC and then switch their VCO frequencies
<azonenberg>
yes but again, there can be chip to chip skew
<azonenberg>
with one chip the channel to channel skew is much less
<azonenberg>
the bigger scopes will have one pll per channel for the multiple adc cards
<electronic_eel>
would the skew with multiple plls be variable or stable?
<azonenberg>
and we will likely have to do deskew cal on them
<Degi>
It could be temperature variable
<azonenberg>
i suspect fixed at any given temp/voltage
<azonenberg>
but could have different slope per chip potentially?
<azonenberg>
just in general i want to minimize room for variations
<azonenberg>
in BLONDEL, the rule is keep it simple
<azonenberg>
2:1 relationship is nice and easy
<electronic_eel>
so it would be possible, but not worth the trouble for BLONDEL
<azonenberg>
even on the higher end scopes i am questioning the need
<lain>
btw I had asked them a while back about the hmcad15xx series sampling, because I wasn't clear on whether operating one in 2ch mode would do simultaneous sampling, suitable for sampling I/Q output of, say, a mixer or etc. they said yes, which I take to mean in 2ch mode the two channels sample at the same time
<lain>
unfortunately, unless I missed it or they've added it, I don't think that information is mentioned in the datasheet?
<lain>
I have not validated that on actual hw
<azonenberg>
well i will be able to validate on my test board
<Degi>
I think it should?
<Degi>
According to figure 3 it does
<Degi>
THe sample is on rising edge of input clock
<electronic_eel>
Degi: but would that help to get 640 and 1 GHz from the same pll? it looks to me like you also need common integer dividers to get different freqs out of it
<Degi>
No but it has nice jitter
<electronic_eel>
you get what you pay for...
<Degi>
50 € SAW
<electronic_eel>
problem is that with these jitter figures you can ruin them with layout mistakes and similar stuff
<electronic_eel>
you need a signal source analyzer to see that
<electronic_eel>
problem is that these are really $$$
<Degi>
That one could do :3 and :5 at the same time
<Degi>
And supply the FPGA clock
<azonenberg>
i want the fpga main clock separate so it can run before the pll is configured
<Degi>
Hmm okay...
<azonenberg>
The LTC6952 is $38.48 @ qty 1 on digikey
<electronic_eel>
the mcu could do the initial config, then the fpga takes over
<Degi>
Maybe a mux inside of the FPGA to switch betweeen clock sources
<azonenberg>
electronic_eel: ah yeah i forgot there is an mcu involved
<azonenberg>
i'm used to having the fpga be the brain of all of my systems
<azonenberg>
and if there is an mcu it's basically a peripheral to the fpga
<electronic_eel>
or the mcu is always doing the pll config, and the fpga just sends commands to the mcu
<azonenberg>
well if the scpi interface is on the mcu
<azonenberg>
then the fpga isnt involved in control plane really at all
<azonenberg>
it will basically be a pure data plane element
<Degi>
The LTC6952 with a CVCO55CC-2962-3388 or 2970-3230 or so could be used for the higher end ones. Total cost is 60 € and the jitter is dope
<Degi>
electronic_eel: Doesnt it only need to set Fout=1000 MHz or 500 MHz and adjust phase?
<Degi>
Like yeah we could use the MCU for that totally
<azonenberg>
my plan is for ~all of the i2c/spi configuration, mode gpios, etc to be in the MCU with the new architecture
<azonenberg>
the fpga will just get a trigger arm signal on a gpio from the mcu
<Degi>
Yes I'd prefer that too
<electronic_eel>
Degi: depends on what the fpga needs to do for example ethernet
<Degi>
azonenberg: And the ADC config?
<azonenberg>
adc config etc i think will all be done by the mcu
<azonenberg>
the fpga will only have the LVDS links
<azonenberg>
the fpga will be LVDS in, ethernet out, with some ddr3 hanging off the side in between
<azonenberg>
then it will also bridge one of the tcp sockets out to a uart or spi bus and send that to the mcu
<azonenberg>
no further processing or parsing within the tcp stream
<Degi>
Hm you said something about the ADC needing to switch fast sometime
<Degi>
Like between settings
<azonenberg>
any reconfiguration of the adc would be triggered by a scpi command
<electronic_eel>
azonenberg: what about more advanced tcp/ip protocols? like dhcp, ntp and so on? will they all be handeled in the fpga?
<azonenberg>
and is over a slow spi bus
<azonenberg>
electronic_eel: TBD. as of now, there's no DHCP, only TCP and UDP
<azonenberg>
my old ipv6 stack did SLAAC in gateware
<electronic_eel>
no dhcp?
<azonenberg>
all of my testing to date has been static ip
<azonenberg>
as my whole lab pretty much runs on statics
<azonenberg>
i only have dhcp on the wifi for guests
<azonenberg>
(i run my own internal DNS, all of my servers, test equipment, etc need to be in DNS anyway. So a static ip is easy)
<Degi>
Are there any plans yet for RAM? A user-upgradeable SODIMM?
<azonenberg>
there will be a DHCP implementation at some point but mcu vs fpga partitioning is tbd
<electronic_eel>
I have just the main server and the network gear on static ips, the rest gets it's ips from my dhcp server
<azonenberg>
re RAM, there will be a ddr3 sodimm. user upgradeability might be trickier because of timing variations etc
<azonenberg>
to start i will source one specific sodimm or something with compatible timing
<Degi>
We have 0.5 s of sample time per GB. That's relatively dope for a scope
<azonenberg>
Yeah. there will need to be a block ram fifo to cover refresh cycles etc but it shouldnt have to be too huge
<Degi>
Hm how does refresh work?
<Degi>
Like do you just send a command to the module and it does all by itself?
<azonenberg>
I will probably be using the xilinx IP which covers that for you, basically you just get random bursts of latency
<Degi>
Hm ok
<Degi>
Well I guess you have a few hundred k of BRAM, that should be enough for a few hundred µs
<azonenberg>
oh a refresh is pretty quick
<azonenberg>
they do only one line of ram at a time
<Degi>
One line? Like a page in a chip?
<azonenberg>
so every N clocks there's one auto refresh cycle
<azonenberg>
dram is organized as a 2D array
<azonenberg>
actually 3D
<azonenberg>
bank, row, col
<Degi>
Hm in only 1 DDR clock cycle?
<Degi>
And it refreshes 1 col?
<azonenberg>
no it refreshes an entire row at once
<azonenberg>
when you open a row you read the whole row out into a temporary buffer
<azonenberg>
there is some latency to do this
<Degi>
Is said buffer in the FPGA? Or on the sodimm?
<azonenberg>
in the dram ic itself
<azonenberg>
then you have super fast access to all column data from that buffer
<azonenberg>
a refresh is basically opening and closing the row in sequence
<azonenberg>
since reading dram is destructive
<Degi>
Hmmh
<azonenberg>
there are multiple banks, typically ~8, within the dram IC that can each be doing stuff independently
<azonenberg>
so typically you'd issue an open command to one bank, while waiting for that read then you'd go and send commands to another bank or read/write data to it, etc
<azonenberg>
all read/write commands are addressed to the working buffer for a given bank
<azonenberg>
so a full access involves opening the row (activate) for the address you want, waiting, sending a read/write to the column of interest (this is typically a burst of 8 N-bit words in sequence, where N=8/16 for most dram ICs, and can be ganged to get wider like on a sodimm)
<azonenberg>
followed by closing the row (precharge)
<azonenberg>
an auto-refresh cycle involves incrementing an internal address counter, activating that row, then precharging it
<azonenberg>
all done via one command
<azonenberg>
you need to issue one auto refresh every X time per spec
<azonenberg>
If you control your access patterns precisely enough, it is possible to make a custom controller that does not ever use auto refresh
<sorear>
a DRAM bank is a 16384x16384 array of bits, to amortize the cost of "edge" circuitry as much as possible (exact numbers vary)
<sorear>
the fundamental operation on a DRAM bank reads, writes, and refreshes 16384 bits at a time
<azonenberg>
and simply ensures all rows that contain data of interest are activated and precharged before they decay
<azonenberg>
the dram core typically runs fairly slowly, like 133 MHz or so
<azonenberg>
but has an extremely wide data bus
<sorear>
when you're reading or writing, you only transfer a subset of those bits across the bus, but a refresh hits all of them, so it's much faster than naively writing every bit
<azonenberg>
the ddr io interface is essentially a serdes around that
<azonenberg>
so if you have an x8 burst architecture, and 8 bit data bus, the native "word size" of accesses to the memory is a 64-bit block
<azonenberg>
which takes 8 DDR transfers (4 clock cycles) to be transmitted
<electronic_eel>
about the LTC6952 that Degi proposed: it goes up to 4.5GHz, so I think it should be able to do 3GHz/5 = 600MHz and 3GHz/3 = 1GHz
<azonenberg>
yes but it's expensive
<azonenberg>
we can use it on the higher speed scopes
<Degi>
Yes it costs like uhh money, I think 60 € total?
<Degi>
Hm the fabric clock and FPGA clock will be phase-locked, right? Such that a small async fifo can be used for CDC
<azonenberg>
"fabric clock"?
<azonenberg>
you mean the bit clock on the io interface?
<Degi>
The FPGA
<Degi>
Like the FPGA data processing clock
<azonenberg>
each adc will have its own io clock and i cannot assume they have any specific phase relationship
<azonenberg>
the dram will have its own clock
<azonenberg>
as will the ethernet
<azonenberg>
there will be multiple cdc fifos at various parts of the system
<Degi>
Why wont the ADCs have specific phase relationships? But I guess as long as in_domain is slower than out_domain, cdc should work even when not phase locked...
<azonenberg>
The clock *to* each adc will be precisely phased
<azonenberg>
i will not be controlling skew from one adc's data bus to the other
<electronic_eel>
but when all clocks come off the same pll, they won't drift among each other, so you don't need big buffers between them
<Degi>
^
<azonenberg>
so one adc to another hitting the fpga can have arbitrary phase offsets (though relatively fixed)
<azonenberg>
My plan is to synchronize data from both adcs, through separate small fifos (one block ram or thereabouts, maybe even lut ram - need to look at how wide it will have to be)
<azonenberg>
into the dram clock domain
<azonenberg>
then write to dram
<azonenberg>
then i will have a small block ram metadata fifo that stores a set of waveform metadata structures (dram start address, length, trigger timestamp, etc)
<azonenberg>
and that will interface with the application layer protocol logic that pulls waveforms out of dram, wraps them in some framing, and sends to TCP
<Degi>
And what is the 16 bit mode?
<azonenberg>
TCP will then write the final framed data to dram and out the socket simultaneously and free dram data as it gets acked
<Degi>
Ahh left justified 14 bits
<azonenberg>
the exact dram buffer allocation scheme etc is tbd
<azonenberg>
my plan internally is for samples to always be 12 bits to keep software and firmware simple
<azonenberg>
i will pad them as needed
<Degi>
I'm not sure how to do the data path tbh, especially with switching 8/12/14 bits...
<Degi>
(I think 14 bits could be useful)
<azonenberg>
but i need to do bandwidth numbers and make sure that will fit in what i have available
<azonenberg>
Also, i have an announcement to make - paperwork just got signed
<azonenberg>
Symbiotic EDA is sponsoring the handheld probe, they're paying a sizeable fraction of the cost of the new VNA in exchange for their logo on the probe's name/serial number sticker
<electronic_eel>
cool!
<azonenberg>
We were in talks to have them do a volume purchase as well but that fell through
<azonenberg>
they are interested in buying the solder-in version once i have that ready though
<azonenberg>
that should be cheap enough to be a viable promotional giveaway
<azonenberg>
no enclosure, no expensive pmk accessories
<azonenberg>
just a flex pcb, sma, and some resistors
<electronic_eel>
ah, so they don't want to use them themselves, but give them to their customers?
<azonenberg>
electrically the same schematic, just a re-layout for a flex stackup
<azonenberg>
Correct
<azonenberg>
as like a trade show swag item etc
<electronic_eel>
my kind of swag...
<azonenberg>
Lol
<electronic_eel>
how will it be soldered in? is there a small wire on the front instead of the socket?
<electronic_eel>
or some kind of castellated hole on the tip?
<Degi>
Oh neat, symbiotic EDA is the same people as behind symbiflow, right?
<Degi>
And how do you generally find people who want to have stuff?
<Degi>
Ooooh my SiFive 1 fits on the ECP5 dev board, that should do as a UART bridge.
<azonenberg>
yes those people
<azonenberg>
they reached out to me after my tweets
<azonenberg>
electronic_eel: my previous solder-in probe used a single 950R tip resistor and a MMCX
<azonenberg>
and microstrip instead of coplanar waveguide
<azonenberg>
the tip was two castellations 1mm apart
<azonenberg>
you were expected to provide a ground test point 1mm away from your signal test point and/or run bodgewires to connect ground as needed
<azonenberg>
flex pcb with a fr4 stiffener by the coax connector
<Degi>
Maybe a rigid PCB which sticks up 90° from the soldered on PCB could be useful too. That way the connector doesnt go all over the place and risk hitting stuff
<azonenberg>
typically i secure them with kapton tape
<azonenberg>
to the top of an ic, another connector, a bare area of the board, etc
<Degi>
Maybe we could put the irc channel onto the readme.md of starshipraider
<azonenberg>
yeah i might do that. and scopehal more importantly
<azonenberg>
this channel was originally just for the software side but seems to be now hw too
<electronic_eel>
do you want to keep the 950r tip resistor for the flex probe or move to the same design as the stiff probe?
<azonenberg>
I will be moving to the new design. the 950r is not flat at all
<electronic_eel>
I think it would be easier to have a small bodge wire as tip than a resistor
<azonenberg>
i had problems after a few hundred MHz
<azonenberg>
the 950 was an 0402
<azonenberg>
it was not physically the contact, i just mean "tip mounted attenuator"
<electronic_eel>
ah, ok. but what do you plan as physical contact for the flex probe?
<azonenberg>
two castellations at the tip of the flex
<azonenberg>
1mm apart
<azonenberg>
signal and ground
<azonenberg>
the same as i had on the current one. I'll grab a pic and send it to you in a few
<electronic_eel>
why not small pads where you solder in small wires?
<azonenberg>
you can solder to the castellations if you want
<azonenberg>
but the idea is to allow a no-stub mounting that straddles a transmission line
<azonenberg>
just put a small slit in the soldermask over it, add a ground pad 1mm away
<azonenberg>
and the probe can go right onto it without adding any stubs etc
<electronic_eel>
aren't the castellations a bit big? the smallest I've seen are 0.6mm pitch
<azonenberg>
these were just vias cut in half. let me see what i used
<azonenberg>
They were 0.4mm diameter vias with 0.65mm wide x 0.75mm deep rectangular pads
<azonenberg>
cut on the long axis by the board edge
<azonenberg>
Multech made those just fine, i don't think i had a single bad board
<azonenberg>
the previous iteration with slightly tighter specs made by pcbway had around 30% yield
<electronic_eel>
half cut vias (that aren't designed as castellations by the pcb fab) often have part of the plating hanging around
<azonenberg>
let me include some photos
<azonenberg>
Stencil for new probe shipped already. nice
<Degi>
Wait WHAT, why does shipment on hold say 2 pieces? Did something disappear?
<Degi>
Hm all this doesnt make sense, why does it say leipzig germany at 16:01? Is that time germany time or UTC? Because under that is 21:50, that is kinda out of order. I guess only the custom status is from leipzig, since the package was still in hong kong
<Degi>
Is DHL playing 4D chess
<electronic_eel>
Degi: they often say customs status updated in the target facility if it was just some data that was updated, not the shipment actually being there
<Degi>
hm ok
<electronic_eel>
I think for customs inspection they now often work only based on the data, not having the actual shipment at hand
<electronic_eel>
they have scans of all the documents and work off that
<electronic_eel>
and I guess they do more thorough inspection only on a small sample of parcels
<azonenberg>
Yeah
<azonenberg>
Customs reserves the right to open and look at any package
<azonenberg>
but they only actually DO that on a tiny fraction
<azonenberg>
those that trip an explosive sensor, look funny on an x-ray, had some red flag on the manifest, or were chosen at random
<azonenberg>
etc
<electronic_eel>
maybe they even include xray images or 3d models in their data package the carrier provides to the customs agents
<azonenberg>
Very possible
<azonenberg>
Also, just shipped out one of my R&S meters to a local cal lab to get an updated traceable cal
<azonenberg>
at least for now i don't plan on maintaining traceable cal on all of the meters and PSUs
<azonenberg>
i can make measurements via this meter to confirm everything is in spec for my own purposes, and will use this meter if i need to make an official datasheet measurement for something i'm sending out to a user
<Degi>
Do all packages go thru x ray?
<azonenberg>
i assume internationally, yes
<azonenberg>
except those of unusual size or weight that might not fit through one
<azonenberg>
i think they have big x-ray systems that can even do a whole vehicle or shipping container in one go
<Degi>
Yeah afaik they do
<electronic_eel>
when corona isn't killing non-cargo aircraft, a lot of registered mail is sent as additional cargo on regular flights. nothing that isn't xrayed will go into such a plane
<azonenberg>
electronic_eel: i have actually taken cargo on planes that wasn't x-rayed. and i know it wasn't because i hand carried it around the x-ray machine
<Degi>
Lol
<azonenberg>
but it was a special case of sensitive equipment that i had to open up in front of the security agent and have them do a visual inspection of
<electronic_eel>
how did security staff allow that?
<Degi>
"Yes this totally isnt a bomb"
<azonenberg>
as well as an explosive test swab that went into a mass spec
<electronic_eel>
Degi: tik tok tik tok...
<Degi>
"Hmm yes that's the clock to uhm you know its a frequency counter or something, a reference clock"
<Degi>
*tik tok gets faster*
<electronic_eel>
azonenberg: one thing I'd like you to try once you have the adc board: test if you can overclock the adc to 666 MHz in 12 bit mode without degradation of the data or the ic getting too hot
<electronic_eel>
666 would be possible with 2 GHz / 3
<electronic_eel>
also 666 is a nice number ;)
<Degi>
I thought about that too
<azonenberg>
The DSO of the devil?
<azonenberg>
:p
<Degi>
Haha
<Degi>
like 666.666
<electronic_eel>
mount the horns where the rack holders go ;)
<Degi>
What do we plan to use as a clock ref?
<Degi>
Print satan face on top of the case
<Degi>
Maybe they can be overclocked to 2 GS/s with some overvolting and liquid nitrogen?
<Degi>
Are analog scopes still produced?
<electronic_eel>
don't think so, too expensive.
<electronic_eel>
all the high voltage, tube and stuff
<electronic_eel>
adc, fgpa and lcd is much cheaper
<azonenberg>
i think there are still a few
<azonenberg>
bk precision makes some, unsure if NOS or not
<Degi>
Why do rigols only have a few Mpts of storage?
<azonenberg>
Degi: they probably use tiny parallel srams
<azonenberg>
degi, electronic_eel: the BK Precision 2120C is a 30 MHz dual trace CRT scope
<azonenberg>
tequipment has three in stock for $536.15 each
<azonenberg>
they have one 2160c which is 60 MHz, $1163.03
<azonenberg>
also lol, one of the specs on the tequipment page
<azonenberg>
"accelerating voltage: 12 kV"
<azonenberg>
I'm quite sure i can guess why this thing is still in stock
<electronic_eel>
at these prices, why would anybody buy such a thing?
<azonenberg>
exactly, that's why it's still on the shelf
<azonenberg>
lol
<Degi>
Woooow these scopes are soo shitty
<electronic_eel>
problem would be the ever-evolving requirements to get ce
<Degi>
*Uses it as x-ray machine instead
<electronic_eel>
if they don't keep up with implementing the changes required, they aren't allowed to sell as new
<azonenberg>
electronic_eel: yeah this is in the US so CE is a non issue
<electronic_eel>
but the stuff degi linked is from Germany
<azonenberg>
oh that, i thought you were talking the BK ones
<electronic_eel>
my guess is that this is for the educational market, where some very old school textbooks require analog scopes
<Degi>
Theres some cool stuff you can do with analog scopes but not as well with digital ones
<electronic_eel>
yeah, like using xy-mode to play fancy graphics games
<electronic_eel>
but modern digital scopes do that quite well too
<Degi>
Like our scope should be able to do that just fine
<Degi>
Especially the PCIe version, straight to GPU
<electronic_eel>
what else is done better on an analog scope?
<Degi>
Nothing that we cant do
<Degi>
The refresh rate
<Degi>
Like DSOs are limited by sample depths and triggers per second, while analog scopes can scan on each trigger
<electronic_eel>
there is still some minimum trigger holdoff required for the trace to go back to the left side
<Degi>
Hm yeah
<Degi>
But like DSOs can have absurdly low refresh rates sometimes
<electronic_eel>
or display the second channel for that matter
<electronic_eel>
yes, if they use their processor to do some math or fft calculation
<electronic_eel>
and also need it to trigger or display the stuff on screen
<Degi>
Hmm
<Degi>
Wonder how fast the PCIe based scope in a decent computer could be, like you could trigger and process on GPU
<Degi>
And output straight to display
<electronic_eel>
but the analog scopes still in production are so bad in comparison I don't fear that they have any chance to play out these things to their advantage
<Degi>
Realtime XYZ hue 3D scope haha
<Degi>
(Like using the three channels as XYZ and hue and rendering that as a 3D graphic)
<azonenberg>
lolol
<electronic_eel>
3d print the trace on an fdm printer ;)
<Degi>
Lol
<Degi>
Or a laser printer
<Degi>
Ooh, thermal printer from supermarkets
<Degi>
Poor FDM printer goes broke at 250 MS/s
<electronic_eel>
need a more professional model then :)
<Degi>
Faster srevos
<Degi>
Oooh PCIe spec says that it could be possible to split a x16 into 4x x4
<Degi>
But that x16 must be supported
<electronic_eel>
Degi: splitting a x16 into 4x x4 is called bifurcation. not all bioses support this
<electronic_eel>
I have mixed experience with this, I need it to put several m2 nvme ssds into one slot
<electronic_eel>
you can't tell from the spec sheet if it works, you always have to try it
<electronic_eel>
sometimes it depends on classic bios vs. uefi
<Degi>
Does uefi generally support it?
<electronic_eel>
sometimes it depends on which kinds of other cards are installed
<electronic_eel>
sometimes just 8 lanes are available on an x16 slot
<electronic_eel>
sometimes you can't figure out what the factors are that it depends on
<electronic_eel>
probably bugs in the bios or something
<electronic_eel>
so my experience is that you have to buy the board/server you want to use it on and try it out, no reliable way to plan ahead
<electronic_eel>
I don't know why it is like this. I think it is a pretty reasonable requirement wanting to put like 20 nvme ssds into one server
<electronic_eel>
but I guess the server manufacturers and customers are a bit behind on that area, still thinking sas/sata, hardware raid controller with battery backup and so on
<Degi>
Yeh lol
<Degi>
HDD ceap
<Degi>
cheap
<azonenberg>
electronic_eel: yeah, i actually am planning on building a Ceph cluster once i get budget
<azonenberg>
the most i think i was able to fit in a proposed design was something like five nvme ssds plus a 10G nic
<Degi>
86.4 TB would be nice
<azonenberg>
two on the motherboard, then three plus a nic = five total ssds
<azonenberg>
then a couple of these nodes to build the whole server
<azonenberg>
the whole cluster*
<electronic_eel>
yes, but I'd prefer the option for some more nvme ssds and some 40g nic
<azonenberg>
i could have done 40g but my core switch only has four 40g ports right now
<azonenberg>
so right now i am routing those to fpga devkits and my workstation
<azonenberg>
the theory being, i may be capped at 10G to any one endpoint but if i have 40g to my desk i can run multiple 10g flows to different devices at once
<electronic_eel>
what I currently have in mind is HPE DL325 G10 plus, they seem to have the option for several u.3 kits. but I couldn't figure out how it exactly goes together, also u.3 is still a bit exotic
<electronic_eel>
but unfortunately you currently can't buy any servers at all, sold out till july or something like that
<bvernoux>
azonenberg, I have bought some Vishay RF Resistor 0402/0603 100 Ohms(FC0402E1000BST1 & FC0603E1000BTBST1) + 50 Ohms FC0603E50R0BTBST1 + Non RF Res 0603 75 & 100 Ohms (RG1608N-750-W-T1 & RG1608N-101-W-T1) 0.05% 10ppm for check with my VNA
<bvernoux>
the non RF resistor are better on paper and 10 times less expensive
<bvernoux>
So I want to check them from 30KHz to 6GHz maybe they are not good for RF too and accuracy is better
<bvernoux>
-good+bad
<bvernoux>
And I have bought the famous AD1-10S ;)
<bvernoux>
To solder the SMA RF connectors perfectly aligned and soldered on both side
<Degi>
Is that a soldering iron?
<bvernoux>
especially for the TRL Board v0.1
<azonenberg>
bvernoux: you didn't get the best resistors
<bvernoux>
no I will solder them with Hot Air
<bvernoux>
azonenberg, ha ?
<azonenberg>
"S" termination is wraparound SAC305 plated terminals
<bvernoux>
they are for RF up to 40GHz IIRC
<bvernoux>
ha
<azonenberg>
"T" is flip chip mount
<azonenberg>
NiAu
<bvernoux>
as so the T are a bit better ?
<bvernoux>
I have not checked that
<azonenberg>
The wraparound have 39.2 fF shunt cap, the flip chip 26.2
<azonenberg>
wraparound have 121 pH inductance, flip chip 1.89
<bvernoux>
ha ye
<bvernoux>
I'm not sure the T are available at mouser in fact let me check