<azonenberg>
+12 dB gain, 100 ohm differential input impedance. When paired with the AKL-AD1 10x passive probe tip (-20 dB attenuation, 1K ohm differential impedance at the tip) you get -8 dB or about 2.5x attenuation end to end
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[starshipraider] azonenberg pushed 1 commit to master [+0/-0/±4] https://git.io/JLSUh
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[starshipraider] azonenberg 205ad04 - Final v0.1 layout for AKL-AD1
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[starshipraider] azonenberg pushed 1 commit to master [+0/-0/±2] https://git.io/JLSTn
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[starshipraider] azonenberg af76816 - Final v0.1 AKL-PD1 layout for prototype
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[starshipraider] azonenberg pushed 1 commit to master [+0/-0/±2] https://git.io/JLST0
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[starshipraider] azonenberg 10ab093 - Last minute bug fix to soldermask at probe tip
<azonenberg>
Prototypes ordered
codysseus has quit [Quit: leaving]
juli966 has joined #scopehal
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[starshipraider] davidlenfesty forked the repository - https://git.io/JLSES
<d1b2>
<david.lenfesty> azonenberg: I'm starting my crack at the active probe host side thingie, where would you want the files to live in the repo? I was thinking in board/probes but idk.
<d1b2>
<david.lenfesty> @TiltMeSenpai Have you started work on the probe side prototype at all? I want to start a tracking issue and just want to make sure I have what exactly is being worked on in there
<d1b2>
<TiltMeSenpai> did we figure out what we're doing for the sideband?
<d1b2>
<david.lenfesty> What I remember from the convo was we were doing debug mode
<d1b2>
<david.lenfesty> with UART going over SBU1/2
<d1b2>
<TiltMeSenpai> stuff came up about using pd custom frames again (also I'm making excuses)
<d1b2>
<TiltMeSenpai> I haven't really done much other than look at potential mcu's and the pinout
<d1b2>
<david.lenfesty> 😛 I don't think it's worth it for PD because it just adds complexity
<d1b2>
<david.lenfesty> host side will need some PD or USB-C specific stuff either way
<d1b2>
<david.lenfesty> but if we do UART over SBU the probe side is just some resistors and hardwired UART
<azonenberg>
Back
<d1b2>
<david.lenfesty> where would you want probe stuff to live in the starshipraider repo?
<d1b2>
<david.lenfesty> well, the active probe control prototype stuff
<azonenberg>
How about boards/probes/active-host-test and active-probe-test
<azonenberg>
for host and peripheral side respectively
<azonenberg>
we can always move around later
<d1b2>
<david.lenfesty> sounds good to me
<azonenberg>
also not sure if you saw but early prototypes of an active diff probe design are at fab now
<azonenberg>
solder in tip and 6 GHz differential amplifier module
<d1b2>
<david.lenfesty> sweet
<azonenberg>
there's no control logic and it's powered by +/- 2.5V from a bench supply. just the amplifier and minimal support stuff as a proof of concept
<azonenberg>
i expect to go through several iterations but it will be a good test subject once you get your side of things working. The other thing i still need to do at some point is a high impedance active voltage probe
<azonenberg>
this one is a transmission line input stage so you have 1K ohms differential impedance still
<azonenberg>
not super low loading, but high BW
<azonenberg>
i also want to make one with a multi-megohm input impedance and lower BW
<d1b2>
<david.lenfesty> @TiltMeSenpai what's your GH username? I want to reference you in the GH issue
<agg>
i saw some chat about uart over sbu1/2 last time, could you use half-duplex uart (supported in hardware in most mcus) and then wire sbu1+2 together to avoid needing to do direction sensing and swapping?
<azonenberg>
agg: my plan was to have the host side be a small fpga, tentatively a spartan-7
<azonenberg>
when the probe powers up it will send a hello on its TX line (no swap capability on the probe)
<azonenberg>
the fpga will listen for a hello on both lines, the one that receives one is declared RX and the other TX
<azonenberg>
then the probe can be a generic mcu without any need for anything special
<agg>
saves faffing with half duplex I guess, though if it's all command-response it might be no harder
<azonenberg>
Yeah it's just that swapping in fpga is super easy
<azonenberg>
and it makes the mcu side firmware easy
<azonenberg>
The plan is to have a parameterizable multichannel host IP we can instantiate on an FPGA to run multiple channels on a single small fpga
<agg>
a lot of mcus have half duplex support fully built in, it rxes all the time it's not txing, so it's still pretty easy
<azonenberg>
for example on BLONDEL there will be four channels on one fpga
<agg>
but yea, no extra hardware needed either way
<azonenberg>
which then presents a spi device interface to the stm32 on the main board which is in charge of things
<d1b2>
<david.lenfesty> and I'm guessing you want to use a Xilinx part because that's what it looks like you're using elsewhere?
<azonenberg>
Yes. I'm targeting xc7s6 in probably ftgb196
<azonenberg>
or whatever the smallest 1mm pitch package option is called
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[starshipraider] davidlenfesty opened issue #3: Active Probe Control/Power Prototypes - https://git.io/JLSgr