05:49 <mkk__> [Hanssel Enrique Morales Norato, skywater-pdk] Hello everyone, where can I find the procedure to apply to the google+efabless Open Source Shuttle Program?

05:49 <mkk__> I know that the main requirement is that the design is published on github and that we must somehow submit it to efabless but I can't find more information on http://efabless.com

06:16 <mkk__> [Riking28, skywater-pdk] Follow the #shuttle channel on slack and the mailing list for announcements Soon:tm:

14:04 <lkcl> cool! https://libre-soc.org/180nm_Oct2020/2020-09-28_15-02.png

14:29 <Lofty> lkcl: is that LibreSoC on SkyWater?

15:45 <lkcl> Lofty: auto-scaleable (thanks to Staf)

20:42 <tnt> Lofty: for config loading you can just chain all the latches you're using to hold the config bits and clock every other FF with a phi1 or phi2 clock, then generating proper pulses you can have a load config chain load "for free".

20:43 <Lofty> Hmm

20:43 <Lofty> Not quite sure I can visualise how that works

20:43 <tnt> mm, I think at least ... I might have screwed up that logic in my head.

20:44 <tnt> scratch that ... it doesn't work.

20:44 <tnt> my bad

20:45 <Lofty> tnt: A flop can be considered as two latches with enables tied to opposing clock levels, right?

20:45 <tnt> yes

20:46 <Lofty> So..if you double-pump the data line, does that give you a pseudo shift register?

20:46 <Lofty> A makeshift register, if you will

20:48 <tnt> I don't think that works.