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<mithro>
Bunnie: There is a method for finding if there is some type of feature possible given a bit using power analysis
<mithro>
bunnie: some researchers used it to figure out the manufacturer JTAG interface that was only enabled through a key negotiation on older microsemi FPGAs
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<_whitenotifier-5>
[sv-tests] hzeller opened issue #486: Add test for var in port-list - https://git.io/JeMH2
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<_whitenotifier-5>
[prjtrellis] Xiretza opened issue #111: Tests fail to run - https://git.io/JeM5Q
<_whitenotifier-5>
[symbiflow-arch-defs] tmichalak opened issue #1194: Organize the tests in xc7 tests directory - https://git.io/JeMdk