clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<awygle> hm, struggling to get nextpnr to accept my edge clock routing between EHXPLLL and EDGECLKSYNCB
<awygle> i'm sure i'm missing some fiddly requirement...
<awygle> ah i didn't have a DIV attribute
<awygle> seems like that should work given the default is 2.0. ah well
<mwk> default parameters on primitives are uhh kind of iffy, given that yosys and nextpnr can and do have differing ideas of those
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<awygle> i see
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<mangelis> heh, tried to make 256-long lookup table (4bit out) in verilog, 269 luts
<mangelis> i wonder if it would be theoretically to get better results, this must be basically a some sort of compression problem
<mangelis> (269x 3-input luts after synthesis that is)
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<z0ttel> 256 inputs?
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