clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
tpb has quit [Remote host closed the connection]
tpb has joined #yosys
lf_ has joined #yosys
lf has quit [Ping timeout: 260 seconds]
jfcaron_ has joined #yosys
jfcaron_ is now known as jfcaron
emeb has quit [Quit: Leaving.]
mwk has quit [Ping timeout: 272 seconds]
mwk has joined #yosys
X-Scale` has joined #yosys
NorthStar` has joined #yosys
X-Scale has quit [Ping timeout: 272 seconds]
X-Scale` is now known as X-Scale
NorthStar` has quit [Quit: HydraIRC -> http://www.hydrairc.com <- s0 d4Mn l33t |t'z 5c4rY!]
zachjs has joined #yosys
jfcaron has quit [Quit: jfcaron]
Degi_ has joined #yosys
Degi has quit [Ping timeout: 264 seconds]
Degi_ is now known as Degi
zachjs has quit [Quit: My MacBook has gone to sleep. ZZZzzz…]
s_frit has quit [Remote host closed the connection]
s_frit has joined #yosys
srk has quit [Remote host closed the connection]
srk has joined #yosys
emeb_mac has quit [Quit: Leaving.]
vidbina_ has joined #yosys
sorki has joined #yosys
srk has quit [Ping timeout: 240 seconds]
sorki is now known as srk
fevv8[m] has quit [Quit: Idle for 30+ days]
jakobwenzel has joined #yosys
s_frit_ has joined #yosys
s_frit has quit [Ping timeout: 272 seconds]
pacak has quit [Remote host closed the connection]
pacak has joined #yosys
vidbina_ has quit [Ping timeout: 264 seconds]
<pepijndevos> mwk, I pointed a debugger at that spice.cc warning, but not having much luck with my limited understanding of yosys internals. I'm trying to see which modules it knows about.
<pepijndevos> oh my goodddd I know...
<pepijndevos> the design->module includes a \ at the start, while the cell->type does not
<pepijndevos> Is one of the two more correct than the other? Like, should I just slap a blackslash at the front of the cell type and be done with it?
<pepijndevos> In Verilog, is \foo different from foo?
<pepijndevos> I seem to recall \foo is a "raw" identifier
<pepijndevos> So seems there is a mismatch between the $_NORMAL identifiers generated by `synth` and the \$_RAW_ identifiers in simcells.v
<daveshah> you need to add -icells to read_verilog
vidbina_ has joined #yosys
<pepijndevos> huh
<pepijndevos> oh okay that works... weird
<pepijndevos> cool thanks! Now I have a blinky in spice... yay?
<tpb> Title: Mixed Signal Simulation Concept ISOTEL (at www.isotel.eu)
<pepijndevos> bleg, write_spice inserts DC sources, which doesn't work for digital models.
mancaus has joined #yosys
emeb has joined #yosys
vidbina_ has quit [Ping timeout: 264 seconds]
<pepijndevos> Would be nice if you could pass to `synth` what kind of flops you want. Seems to be "all of them" rn
<pepijndevos> I guess just run dfflegalize right after
<Lofty> pepijndevos: yeah, that's the idea
s_frit has joined #yosys
s_frit_ has quit [Ping timeout: 264 seconds]
<mwk> *sigh* we had a discussion about it
<mwk> there's no good way rn
<mwk> basically `synth` should not be considered a standalone synth flow
<mwk> and you're supposed to run dfflegalize *and* rerun abc afterwards (because dfflegalize can emit more gates)
<pepijndevos> hrm
emeb has quit [Ping timeout: 246 seconds]
emeb has joined #yosys
dys has quit [Ping timeout: 240 seconds]
markus-k has quit [Quit: ZNC - http://znc.in]
markus-k has joined #yosys
Raito_Bezarius has quit [Ping timeout: 260 seconds]
peeps[zen] has joined #yosys
peepsalot has quit [Ping timeout: 272 seconds]
peepsalot has joined #yosys
peeps[zen] has quit [Ping timeout: 264 seconds]
tmeissner has joined #yosys
emeb_mac has joined #yosys
Raito_Bezarius has joined #yosys
vidbina_ has joined #yosys
jakobwenzel has quit [Remote host closed the connection]
SpaceCoaster_ has quit [Quit: ZNC 1.7.2+deb3 - https://znc.in]
dys has joined #yosys
<pepijndevos> huh, just realized there isn't a fine LUT cell, so `synth -lut 4` just leaves you with a $lut while `synth` produces fine cells.
<Lofty> I don't think a fine LUT cell makes any sense
kraiskil has joined #yosys
<mrec> So acrylic is cutting fine with a single flute upcut bit (which is advertised almost everywhere in the net)
<mrec> next step m0.5/m0.8 gear cutting
modwizcode has joined #yosys
vidbina_ has quit [Ping timeout: 260 seconds]
kraiskil has quit [Ping timeout: 264 seconds]
tmeissner has quit [Quit: My MacBook Air has gone to sleep. ZZZzzz…]
tmeissner has joined #yosys
tmeissner has quit [Client Quit]
s_frit has quit [Ping timeout: 240 seconds]
vidbina_ has joined #yosys
emeb has quit [Quit: Leaving.]
jfcaron has joined #yosys