03:48 <omnitechnomancer> What would making a combinatorial loop actually result in in verilog?

06:27 <azonenberg> omnitechnomancer: either a ring oscillator or a latch

06:27 <azonenberg> depending on the exact nature of the loop

06:27 <azonenberg> i.e. stable or not

06:28 <omnitechnomancer> I am not sure what the purpose of this is, https://github.com/Kirill888/parallella-fpga-dummy-io/blob/master/ip_repo/parallella_dummy_io/src/dummy_parallella_io.v#L251-L254

06:33 <omnitechnomancer> I expect in an FPGA the tools complain at you about it and probably delete it?

17:02 <whitequark> azonenberg: or just a miscompilation

17:48 <etrig> omnitechnomancer: since you got me looking at parallella again, I added board support for xilinx's u-boot 2020.1 and moved the epiphany driver out-of-tree with dkms support, which seems to work great with mainline linux