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<promach3>
mwk hell__ is An the MSB of Column address or Row address ?
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<hell__>
promach3: An would be the DRAM address pins
<hell__>
for PREA, A10 needs to be logic high, and all other address pins (A0-A9, A11-A15) can be either high or low
<hell__>
and the number of bits for row/column addresses depends on the DRAM chip
<hell__>
larger capacity chips need more address bits
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<promach3>
hell__: wait, how do I differentiate between row address and column address ?
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<jeanthom>
promach3, "Row addressing is denoted as A[n:0]. For example, 1Gb: n = 12 (x16); 1Gb: n = 13 (x4, x8); 2Gb: n = 13 (x16) and 2Gb: n = 14 (x4, x8); 4Gb: n = 14 (x16); and 4Gb: n = 15 (x4,x8)."
<jeanthom>
(from Micron's DDR3 datasheet)
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