03:58 <cyrozap> Anyone here aware of any projects/research on using hardware to verify a model or specification? That is, instead of formal methods to verify that the behavior of some hardware matches a reference specification, you use the hardware as a reference (and possibly also formal methods) to verify that the specifications accurately describe the hardware?

03:59 <cyrozap> The context is ISA reverse engineering, and verifying that my Ghidra processor modules accurately model what each instruction does.

04:00 <cyrozap> I have some ideas on how to do this, but if someone else has already done that it could save me a bunch of time.

09:43 <promach3> jeanthom: What does it mean by 1Gb: n = 12 (x16); 1Gb: n = 13 (x4, x8); ?

09:44 <jeanthom> There are different data width depending on the chip you use

09:44 <jeanthom> With a bigger data width your DRAM chip will have less address pins

09:57 <promach3> jeanthom: what exactly is n = 12 and n= 13 ?

09:58 <promach3> in other words, what do you mean by n ?

09:59 <promach3> bitwidth of address ?

10:03 <jeanthom> n is the number of bits used when sending the row adress over the address pins

10:38 <promach3> ok