whitequark changed the topic of #glasgow to: glasgow debug tool · code https://github.com/whitequark/Glasgow · logs https://freenode.irclog.whitequark.org/glasgow
<gruetzkopf> E: glasgow.applet.benchmark: mode source failed!
<gruetzkopf> is that applet currently supposed to work
<whitequark> gruetzkopf: mode source and sink should work
<whitequark> mode loopback should not
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<_whitenotifier-c> [whitequark/Glasgow] whitequark pushed 1 commit to master [+1/-0/±1] https://git.io/fhQLn
<_whitenotifier-c> [whitequark/Glasgow] whitequark 6c47f86 - applet.audio_output: new applet.
<_whitenotifier-c> [Glasgow] Success. The Travis CI build passed - https://travis-ci.org/whitequark/Glasgow/builds/491487257?utm_source=github_status&utm_medium=notification
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<gruetzkopf> loop hangs, sink works fine
<whitequark> loop is unfortunately expected to hang, there's a timing issue i keep trying to fix
<whitequark> source should work on revB and revC
<whitequark> run with -vv and post the log please
<whitequark> gruetzkopf: that's really weird. can you do a diff between expected/actual?
<gruetzkopf> i have exactly this one device to test with, not sure?
<whitequark> no, it's in the applet
<whitequark> give me a moment
<gruetzkopf> they're definitly different, find them at https://gruetzkopf.org/glasgow
<whitequark> expired certificate :S
<whitequark> gruetzkopf: try again on commit ec6e3ca0b25e8da6f3d58a80190c7b126a5fd568
<whitequark> I think you're hitting #89 in a particularly unlucky PVT corner
<whitequark> or, it could be something else
<gruetzkopf> argh, stupid certbot
<gruetzkopf> will do
<whitequark> try selftest with this
<gruetzkopf> I: glasgow.applet.selftest: self-test: PASS
<whitequark> hm
<whitequark> oh, right, that wouldn't help a lot
<whitequark> ok, yeah, so try that earlier commit
<whitequark> it's also broken but in a different way
<gruetzkopf> yes, source and sink work on that commit
<whitequark> ok, so it is #89
<whitequark> do you feel like trying to fix it? I can explain what's needed
<gruetzkopf> was that the "fun timing between fx2 and ice40" issue with SB_GB_IO?
<whitequark> yes, but the solution doesn't involve timing at all
<whitequark> it's actually a few tweaks on FX2 side
<gruetzkopf> that i can try to do
<whitequark> ok, so
<whitequark> hm
<whitequark> hang on
<whitequark> gruetzkopf: ok, can you take a look at the semantics of flags in FX2?
<whitequark> specifically, let's say FF (full flag) with INFM1 bit set
<whitequark> and how it compares with PF and FIFO level set to FIFO depth - 1
<whitequark> I can't figure out for the life of me if these two are equivalent
<gruetzkopf> will do
<gruetzkopf> they read equivalently for DECIS=0, i should grab a LA and compare them (see if they rise on the same edge)
<whitequark> please do
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<Yatekii> \o/ gruetzkopf is here :P
<gruetzkopf> hi!
<gruetzkopf> i'll grab a scope in about 2h
<gruetzkopf> can i (easily) make one of the IN endpoints not be used so i can steal its FLAG_FF pin in favor of the others FLAG_PF?
<gruetzkopf> okay, i can take out the ep4->ep8 loopback test from selftest for this
<Yatekii> gruetzkopf: you know Doeme aight?
<gruetzkopf> yep
<Yatekii> hah! i knew it
<Yatekii> didn't know u were part of this awesome project!
<Yatekii> discovered it a few days back :)
<gruetzkopf> i more-or-less stumbled upon it by it being discussed A LOT in another channel i was in
<gruetzkopf> (before this channel existed)
<gruetzkopf> and now i'm apparently hunting after bad documentation for parts used
<Yatekii> haha, #mosfetkiller? ^^
<gruetzkopf> yep.
<Yatekii> yeah, I basically did this as a bachelor thesis (FPGA IP, webserver on the ARM core, Webui for timedomain & frequency domain analysis) I used a red pitaya tho and ofc it had way less features, so I am really interested in this project :)
<Yatekii> will buy one for sure!
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